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ACT43750 Datasheet(PDF) 17 Page - Qorvo, Inc

Part # ACT43750
Description  RF POL Drain-Switch Driver / Gate-bias Regulator
PDF  43 Pages
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Manufacturer  QORVO [Qorvo, Inc]
Direct Link  https://www.qorvo.com/
Logo QORVO - Qorvo, Inc

ACT43750 Datasheet(HTML) 17 Page - Qorvo, Inc

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Data Sheet Rev. F, February 10, 2025 | Subject to change without notice
17 of 43
www.qorvo.com
© 202 Qorvo US, Inc. All rights reserved.
ACT43750
RF POL Drain-Switch Driver / Gate-bias Regulator
®
External Configuration Resistors
The ACT43750 contains additional functionality pro-
grammed with external resistors connected to the
CONF pin. During power-up, the ACT43750 uses a five-
bit analog-to-digital converter (5-bit ADC) to read the
voltage at the CONF pin. It calculates the voltage on
CONF as a percentage of the V5 voltage (typically 5V)
and generates a 5-bit output. The resulting 5 bits
(RCONF[4:0]) overwrite the default bits except bit [3] in
register 0x11h resulting in modified functionality from
the default CMI settings. The external configuration re-
sistors change the following functionality.
•
Sets the clock as a master or slave
•
Enables or disables the SYNC pin as an output
in slave mode
•
Sets the SYNC pin input polarity as rising or
falling edges when in slave mode
•
Sets the Slave I2C Address
Not all the RCONF[4:0] bits translate directly into the
bits in register 0x11h. Table 3 shows how each 0x11h
register bit is populated after startup.
Table 3. Register 0x11 Bits
Register 0x11h Bit
RCONF[4:0] bit
0x11h Bit 7
Not used
0x11h Bit 6
RCONF[4]
0x11h Bit 5
RCONF[3]
0x11h Bit 4
RCONF[3]
0x11h Bit 3
Set by the default CMI
0x11h Bit 2
RCONF[2]
0x11h Bit 1
RCONF[1]
0x11h Bit 0
RCONF[0]
Refer to Table 5 and the ACT43750 register definition
application note for details. Shorting CONF to ground
disables the CONF startup routine and keeps the de-
fault register values.
Figure 4 shows the CONF resistor connection, and Ta-
ble 5 shows the required resistor divider values and the
resulting 5-bit binary value.
I2C Slave Address
The 7-bit I2C Slave address is generated by a combina-
tion of fixed values, a default register setting defined by
the CMI, and the RCONF values. The table 4 shows
how the 7-bit I2C Slave address is generated. It is a sim-
plified version of Table 5
Table 4. 7-Bit I2C Slave Address Bits
7
–Bit I2C Slave Address Bits
Bit 7
Always = 0
Bit 6
Always = 1
Bit 5
= Reg11[3]
Bit 4
Always = 0
Bit 3
=Reg11[3]=RCONF[2]
Bit 2
=Reg11[2]=RCONF[1]
Bit 1
=Reg11[1]=RCONF[0]
Bit 0
I2C Read/Write Bit
5-bit
ADC
V5
RCONF[4:0]
5
CONF
V5
AGND
ACT43750
Figure 4. The CONF Pin Connection



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