ACT43750 datasheet(25/43 Pages) QORVO

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Data Sheet Rev. F, February 10, 2025 | Subject to change without notice

25 of 43

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ACT43750

RF POL Drain-Switch Driver / Gate-bias Regulator

IC BIAS CIRCUITRY

The ACT43750 supports both controlled positive and

negative output voltages. This requires multiple refer-

ence voltage and ground references.

V12 Bias Regulator

The IC requires an external 12V bias input. This bias

voltage is applied to the V12 pin, which requires at least

a 10µF X5R or X7R ceramic capacitor, CV12, to AGND.

The 12V bias voltage should be relatively clean with

less than 100mV of ripple. This voltage powers the ICs

and generates the other reference voltages and the

negative gate voltage.

5V Bias Regulator

An internal linear regulator provides a 5V bias at the V5

pin. This bias voltage directly powers most of the inter-

nal circuitry. The 5V bias voltage should be relatively

clean with less than 50mV of ripple. It requires a 2.2µF

X5R or X7R ceramic capacitor, CV5, to AGND

Floating 5V Bias Regulator

Because the ACT43750 provides a negative gate volt-

age, it needs a 5V bias that is referenced to the negative

gate voltage, VG. The ACT43750 generates this float-

ing 5V bias with a linear regulator output at the GV5 pin.

This regulator biases all circuitry that is referenced to

the VG voltage. It requires a 2.2µF X5R or X7R ceramic

capacitor, CGV5, to the VG pin.

Low-side Gate Drive Regulator

The ACT43750 provides a linear regulator to power the

low-side gate driver at the LSR pin. This allows the user

to optimize the gate drive voltage for the specific FETs

used in the design. Note that the voltage on LSR is used

for both the low-side and high-side FETs. The

VoLSR[3:0] bits in register 0x0Fh [3:0] set the default

gate drive voltage. The default LDO voltage is set at the

factory. This voltage cannot be changed on the fly. Con-

tact Qorvo if a different default voltage is needed. The

low-side gate drive regulator requires a 2.2µF ceramic

capacitor to PGND.

High-side Gate Drive Regulator

Note that the high-side FET gate voltage is the same as

the low-side FET. The ACT43750 provides a charge-

pump regulator to power the high-side gate driver at the

BT50 pin. This charge pump transfers the LSR voltage,

referenced to PGND, to the CBT50 capacitor, refer-

enced to VD, the drain voltage. The high side gate drive

regulator requires a 47nF capacitor (CCP) in series with

a 33ohm resistor (RCP) between the CPL and CPH pins.

The charge pump resistor RCP power dissipation is a

function of drain voltage, frequency, and capacitance.

Use the following equation to calculate the RCP power

dissipation.

�� = 0.5 ∗ �� ∗ ��2 ∗ ��

(1)

Where:

P – power loss of charge pump resistor, unit Watt.

C – charge capacitance, the unit is F.

F – drain voltage switching frequency, the unit is Hz.

V – drain voltage, the unit is Volt.

The RCP resistor power rating should be higher than

power loss and have at least a 50% margin.

PMIC OPERATION

The

following

sections

describe

the

available

ACT43750 functionality. The detailed functional dia-

gram is shown in Figure 5.

DSW50 Drain Voltage

The DSW50 block provides drain switch control for RF

PA GaN FETs. It does this by driving two separate FETs

to apply the drain voltage to the RF PA and remove the

drain voltage from the RF PA. This block supports both

enhanced-mode power GaN and traditional Si (silicon)

power FETs.

High-Side Driver: The high-side FET driver has two

separate output pins that provide a push-pull output to

drive the drain FET. The HSGU pin turns the drain FET

on by applying a floating voltage to the FET gate refer-

enced to the VD pin's drain voltage. The HSGD pin

turns the drain FET off by pulling the gate to the VD

voltage.

Low-Side Driver: The low-side FET driver also has two

separate output pins that provide a push-pull output to

drive the bottom FET. The LSGU pin turns the bottom

FET on by applying the gate voltage to the FET gate.

This voltage is ground-referenced. The LSGD pin turns

the bottom FET off by pulling the gate to the ground.

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