ACT43750 datasheet(16/43 Pages) QORVO

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Data Sheet Rev. F, February 10, 2025 | Subject to change without notice

16 of 43

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ACT43750

RF POL Drain-Switch Driver / Gate-bias Regulator

Master Address

The ACT43750 provides a Master I2C bus that gives the

system additional flexibility to automatically control and

adjust IC functionality that can optimize RF PA function-

ality in the system. Examples include using an external

memory IC containing a lookup table to automatically

adjust the voltages and currents. The Master can per-

form the following functions.

•

Scans to check if companion devices are on the

Master I2C bus.

•

Enable and disable the ACT43850 companion IC.

•

Provide bypass control from a system-host,

through the ACT43750 to the ACT43850.

•

Program or adjust the ACT43850 output voltage.

This is the RF PA drain voltage.

•

Read an external I2C memory IC to set the

ACT43850 output voltage.

•

Read an external I2C memory IC

to set the

ACT43750 Idq calibration current.

•

Read an external I2C memory IC to set the

ACT43750 negative gate voltage.

A system host, via the I2C Slave, can turn ON or OFF

the I2C master block using register 0x17h [1]. The host

can also change the I2C master clock speed using reg-

ister 0x17h [3:2].

Scanning for I2C Companion Devices

The IC automatically scans for I2C slave devices on the

Master bus when the state machine enters the REG50

Ramp state. The Master bus can only have a single

ACT43850 connected. It can also have a single I2C

memory device connected. If an ACT43850 slave de-

vice is found, the IC sets register 0x99h [0] = 1 and

stores

the slave’s I2C address in register 0x98 [7:1]. If

an I2C memory device is found, the ACT43750 sets reg-

ister 0x99h [1] to 0.

I2C Bypass

The ACT43750 provides an I2C bridge logic between

the I2C Slave and the I2C Master blocks. A system host

can turn on the bypass function by setting register

0x17h [0] = 1. In bypass mode, the ACT43750 will pass-

through commands from the system host on the Slave

bus (SDA, SCL), to the ACT43850 on the Master

bus(SDA50, SCL50). It also transfers the ACT43850 re-

sponses back to the system host.

To avoid communication issues, when the ACT43750

executes I2C on the Master bus, it sets register 0x99h

[2] = 1 to let the system host know that it must wait until

the Master bus communication is complete. When the

Master bus communication is complete, the IC clears

this bit.

Device initialization /configuration

The ACT43750 provides multiple layers/steps to select

its configuration and operation modes. At startup, the IC

reads internal I2C registers and external component val-

ues to configure its operation. After startup, users can

change functionality by changing the internal register

settings with standard I2C commands.

Factory Programming Options / CMI I2C Regis-

ters

The ACT43750 contains several 8-bit registers that are

preprogrammed at the factory. The default register val-

ues are set at the factory. These default values are re-

ferred to as the CMI (Code Matrix Index), and they are

stored in non-volatile memory (NVM). Each different

CMI is referred to by a three-digit number which results

in a unique orderable part number. The I2C registers

can be changed via the I2C Slave bus. Refer to the

ACT43750 Register Definition Application Note for

more details about the available register settings. Ex-

amples of functionality that can be changed via I2C are

below. Refer to the Register Map Application Note for

more details.

Table 2. ACT43750 I2C Functions

IC Function

REGG output voltage range and resolution

0x06h-0x07h

Spread-spectrum behavior details

0x10h

External and internal clock synchronization

0x11h

Internal clock oscillator output control

0x11h

External clock synchronization polarity se-

lection

0x11h

DSW50 dead-time control adjustment

0x12h

LSR voltage (power FET gate voltage)

0x0Fh

RSCAL calibration target adjustment

0x13h

Internal or external reference selection

0x0Fh

Interrupt Mask

0x09h-0x0Ah

REGG soft-start time

0x0Eh

Power good delay time

0x10h

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