ACT43750 datasheet(27/43 Pages) QORVO

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Data Sheet Rev. F, February 10, 2025 | Subject to change without notice

27 of 43

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ACT43750

RF POL Drain-Switch Driver / Gate-bias Regulator

REGG Negative Gate Drive

The REGG block is an ultra-low noise inverting step-

down dc-to-dc regulator with integrated FETs. This

block supports 300mA (500mA peak) of sourcing output

current (current into load devices) and 100 mA of sink-

ing current (current into the ACT43750). The negative

gate voltage at the VG output is referenced to PGND.

When the REGG block is enabled, the gate voltage

slews to the value set in DACGMAX (Register 0x15).

The ACT43750 provides an autocalibration routine to

automatically find the correct gate voltage that drives

the RF PA GaN FET at its optimum bias point.

Voltage Reference

The ACT43750 provides a programmable reference

voltage system for the REGG that consists of the follow-

ing sub-blocks.

• DACG: 13-bit DAC with output voltage from 0.75 V to

3.00 V. Note that the resulting gate voltage is scaled to

-2x the DACG voltage.

• External reference input at the REFIN pin. The user

can supply an external reference voltage to replace the

internal DAC reference voltage.

• DACG Digital Servo that controls the gate voltage slew

rate when changing from one voltage to another.

• Soft-start control by adjusting charge current to capac-

itor CGREF.

• Reference voltage noise reduction circuits to minimize

noise applied to the RF PA gate.

DACG

The ACT43750 provides multiple methods of program-

ming the 13-bit DAC between 0.75 V to 3.00 V. The

DACG block contains several registers that set the

DACG voltage. The actual DAC output voltage is set by

the 13 bits in registers 0x07h [7:0] and 0x06h [4:0]. Reg-

ister 0x07h contains the upper 8 msb and register

0x06h[4:0] contains the lower 5 msb. These two regis-

ters are combined to create a 13-bit register, DACG.

The DACG register sets the DACG output voltage,

which can be programmed between 0.75V and 3.0V in

366.2µV steps. Setting DACG below 0.75V is not al-

lowed.

DACG Voltage = DACG * 366.2µV

Where DACG is the decimal equivalent of the 13 bits in

the hex-based register. Table 6 shows several example

DACG register values converted to the DACG voltage

and the resulting gate drive voltage. Note that the re-

sulting gate drive voltage is -2 times the DACG voltage.

DACGMIN and DACGMAX are 8-bit registers that pro-

gram the minimum and maximum DACG clamp voltage.

These two registers define the starting and stopping

points in the autocalibration routine and provide safety

clamps to place known limits on the RF PA gate voltage.

DACGMIN is in register 0x14h and DACGMAX is in reg-

ister 0x15h. These registers correspond to the 8 most

significant bits of DACG.

Table 6. DACG Register Values

Reg07[7:0]

Reg06[7:0]

Reference Voltage Target

Output Voltage Target

(VGREF-VG), (VDACG-VAGND)

(VG-VPGND)

0100 0000

0000 0000

+0.750V

-1.500V

…....

0101 0101

0000 1010

+0.9997V

-1.9995V

0101 0101

0000 1011

+1.0001V

-2.0002V

0101 0101

0000 1100

+1.0005V

-2.0009V

…....

0110 1010

0001 0101

+1.250V

-2.500V

…....

1000 0000

0000 0000

+1.500V

-3.000V

…….

1100 0000

0000 0000

+2.250V

-4.500V

…....

1111 1111

0001 1111

+3.000V

-6.000V

There are multiple ways to program the DACG bits.

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