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ACT4910 Datasheet(PDF) 12 Page - Qorvo, Inc

Part # ACT4910
Description  Power Loss Protection with 6A eFuse
PDF  37 Pages
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Manufacturer  QORVO [Qorvo, Inc]
Direct Link  https://www.qorvo.com/
Logo QORVO - Qorvo, Inc

ACT4910 Datasheet(HTML) 12 Page - Qorvo, Inc

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Data Sheet Rev. E August 2021 | Subject to change without notice
12 of 37
www.qorvo.com
ACT4910
Power Loss Protection with 6A eFuse
®
I2C INTERFACE ELECTRICAL CHARACTERISTICS
(VIN = 5V, TA = 25°C, unless otherwise specified.)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SCL, SDA Input Low
VIO = 1.8V
0.6
V
SCL, SDA Input High
VIO = 1.8V
1.2
V
SDA Leakage Current
SDA=5V
1
µA
SDA Output Low
IOL = 5mA
0.35
V
SCL Clock Frequency, fSCL
0
1000
kHz
SCL Low Period, tLOW
0.5
µs
SCL High Period, tHIGH
0.26
µs
SDA Data Setup Time, tSU
50
ns
SDA Data Hold Time, tHD
(Note1)
0
ns
Start Setup Time, tST
For Start Condition
260
ns
Stop Setup Time, tSP
For Stop Condition
260
ns
Capacitance on SCL or SDA Pin
10
pF
SDA Rise Time SDA, Tr
Device requirement
120
ns
SDA Fall Time SDA, Tf
Device requirement
120
ns
Pulse Width of spikes must be suppressed on SCL and SDA
0
50
ns
Note1: Comply with I2C timings for 1MHz operation - “Fast Mode Plus”.
Note2: No internal timeout for I2C operations, however, I2C communication state machine will be reset when entering UV/POR State.
Note3: This is an I2C system specification only. Rise and fall time of SCL & SDA not controlled by the device.
Note4: Device Address is factory configurable to 7’h1A, 7’h3A, 7’h5A.
Figure 2: I2C Data Transfer
SDA
SCL
tST
tSU
tHD
tSP
tSCL
Start
condition
Stop
condition



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