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33800 Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc |
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33800 Datasheet(HTML) 18 Page - Freescale Semiconductor, Inc |
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18 / 39 page ![]() Analog Integrated Circuit Device Data 18 Freescale Semiconductor 33800 FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION Figure 5. Functional Block Diagram ANALOG CONTROL CIRCUITRY The 33800 is designed to operate from 5.0 to 36V on the VPWR pin. The VPWR pin supplies power to all internal regulators, analog and logic circuit blocks. The VDD supply is used for setting communication threshold levels and supplying power to the SO driver. This IC architecture provides low quiescent current Sleep Modes. Applying VPWR to the device will cause a Power On Reset (POR). The on-chip oscillator supports the selectable PWM frequency and duty cycle. The on-chip voltage regulator and bandgap supply the required voltages to the internal circuitry. MCU INTERFACE AND OUTPUT CONTROL The device is designed with six flexible PWM gate driver outputs. Each driver may be controlled directly from the MCU and may be programmed through the SPI for a specific frequency and duty cycle. LOW–SIDE DRIVERS: OUT1 – OUT8 The 33800 provides flexible control of 8 low side driver outputs. Outputs 1 and 2 are specifically designed with higher current limits to accommodate lamp inrush current. The device allows for parallel control of the outputs or SPI control through the use of several input command words. CONSTANT CURRENT LOW SIDE DRIVERS: CCD1 AND CCD2 The CCD1/CCD2 constant current controllers are switching hysteretic current controllers with a superimposed dither. The controllers are designed to provide a programmable constant current through a solenoid valve. Fluid flow is controlled by the amount of current run through the driven solenoid valve. GATE PRE-DRIVERS: GD1 – GD6 The GD1 – GD6 pins are the gate drive outputs for external MOSFETS. They can be PWM’ed with speed and duty cycle choices per the SPI command registers. Internal to the device is a Gate to Source resistor designed to hold the external MOSFET in the OFF state while the device is in POR. |
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