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ADS5237 Datasheet(PDF) 13 Page - Texas Instruments

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Part # ADS5237
Description  Dual, 10-Bit, 65MSPS, 3.3V Analog-to-Digital Converter
PDF  29 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS5237 Datasheet(HTML) 13 Page - Texas Instruments

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ADS5237
SBAS420A – AUGUST 2007 – REVISED OCTOBER 2007
Table 2. TERMINAL FUNCTIONS (continued)
NAME
PIN #
I/O
DESCRIPTION
D2_B
14
O
Data bit 8 (D2), channel B
D3_B
15
O
Data bit 7 (D3), channel B
D4_B
16
O
Data bit 6 (D4), channel B
D5_B
17
O
Data bit 5 (D5), channel B
D6_B
18
O
Data bit 4 (D6), channel B
D7_B
19
O
Data bit 3 (D7), channel B
D8_B
20
O
Data bit 2 (D8), channel B
D9_B (MSB)
21
O
Data bit 1 (D9), channel B
DVA
26
O
Data valid, channel A
DVB
22
O
Data valid, channel B
GND
4, 7, 23, 25, 44
Output buffer ground
INA
50
I
Analog input, channel A
IN A
51
I
Complementary analog input, channel A
INB
63
I
Analog input, channel B
IN B
62
I
Complementary analog input, channel B
INT/EXT
56
I
Reference select; 0 = External (default), 1 = Internal; force high to set for internal reference operation.
ISET
60
O
Bias current setting resistor of 56.2k
Ω to ground
When SEL = 0, MSBI (most significant bit Invert)
MSBI/SEN
41
I
1 = Binary two's complement, 0 = Straight offset binary (default)
When SEL = 1, SEN (serial write enable)
NC
10, 11, 27, 28
When SEL = 0, OEA (output enable channel A)
OEA/SCLK
42
I
0 = Enabled (default), 1 = 3-state
When SEL = 1, SCLK (serial write clock)
OE B
6
I
Output enable, channel B (0 = Enabled [default], 1 = 3-state)
OVRA
39
O
Over-range Indicator, channel A
OVRB
9
O
Over-range Indicator, channel B
REFB
54
I/O
Bottom reference/bypass (2
Ω resistor in series with a 0.1μF capacitor to ground)
REFT
53
I/O
Top reference/bypass (2
Ω resistor in series with a 0.1μF capacitor to ground)
Serial interface select signal. Setting SEL = 0 configures pins 41, 42, and 45 as MSBI, OEA, and
STPD, respectively. With SEL = 0, the serial interface is disabled. Setting SEL = 1 enables the serial
interface and configures pins 41, 42, and 45 as SEN, SCLK, and SDATA, respectively. Serial
SEL
1
I
registers can be programmed using these three signals. When used in this mode of operation, it is
essential to provide a low-going pulse on SEL in order to reset the serial interface registers as soon
as the device is powered up. SEL therefore also has the functionality of a RESET signal.
When SEL = 0, STPD (power-down)
STPD/SDATA
45
I
0 = Normal operation (default), 1 = Enabled
When SEL = 1, SDATA (serial write data)
VDRV
5, 8, 40, 43
Output buffer supply
Copyright © 2007, Texas Instruments Incorporated
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