TLK6002 datasheet(53/98 Pages) TI2

53 / 98 page

TLK6002

www.ti.com

SLLSE34A – MAY 2010 – REVISED AUGUST 2010

Table 3-13. SERDES_CONTROL_1

Address: 0x08

Default: 0x3D4C

BIT(s)

NAME

DESCRIPTION

ACCESS

Serdes Rx precursor equalizer selection

000 = 1/9 cursor amplitude

001 = 3/9 cursor amplitude

010 = 5/9 cursor amplitude

8.14:12 EQPRE[2:0]

011 = 7/9 cursor amplitude (Default 3’b011)

100 = 9/9 cursor amplitude

101 = 11/9 cursor amplitude

110 = 13/9 cursor amplitude

111 = Disable

Clock data recovery algorithm threshold selection

00 = Four vote threshold

8.11:10 CDRTHR[1:0]

01 = Eight vote threshold

10 = Sixteen vote threshold

11 = Thirty two vote threshold (Default 2’b11)

Clock data recovery algorithm frequency multiplication selection

00 = First order. Frequency offset tracking disabled

8.9:8

CDRFMULT[1:0]

01 = Second order. 1x mode (Default 2’b01)

10 = Second order. 2x mode

11 = Reserved

Adaptive gain control loop

00 = Attenuator will not change after lock has been achieved, even if AGC becomes

unlocked

8.7:6

AGCCTRL[1:0]

01 = Attenuator will not change when in lock state, but could change when AGC becomes

unlocked (Default 2’b01)

10 = Force the attenuator off.

11 = Force the attenuator on

Auto zero calibration.

00 = Auto zero calibration initiated when receiver is enabled (Default 2’b00)

8.5:4

AZCAL[1:0]

01 = Auto zero calibration disabled

10 = Forced with automatic update.

11 = Forced without automatic update

Determines whether LSB or MSB of the parallel inputs to be sent out first on serial

transmit pins.

8.3

TX_PMA_BIT_ORDER

0 = TDx[19] or TDx[9] (MSB) is serially transmitted first

1 = TDx[10] or TDx[0] (LSB) is serially transmitted first (Default 1’b1)

Determines whether serially received first bit to be sent out on LSB or MSB of the parallel

outputs.

8.2

RX_PMA_BIT_ORDER

0 = RDx[19] or RDx[9] (MSB) is serially received first

1 = RDx[10] or RDx[0] (LSB) is serially received first (Default 1’b1)

Transmitter polarity.

0 = Normal polarity. TXxP considered positive data and TXxN considered negative data

8.1

TX_INVPAIR

(Default 1’b0)

1 = Inverted polarity. TXxP considered negative data and TXxN considered positive data

Receiver polarity.

0 = Normal polarity. RXxP considered positive data. RXxN considered negative data

8.0

RX_INVPAIR

(Default 1’b0)

1 = Inverted polarity. RXxP considered negative data. RXxN considered positive data

Table 3-14. SCRAMBLER_CONTROL

Address: 0x09

Default: 0x0000

BIT(s)

NAME

DESCRIPTION

ACCESS

0 = Disables scrambler on the transmit datapath (Default 1’b0)

9.15

TX_SCRAMBLER_EN

1 = Enables scrambler on the transmit datapath

7 bit scrambler seed used when TX scrambler is enabled.

9.14:8 TX _SCRAMBLER_SEED[6:0]

(Default 7’b0000000)

0 = Disables De-scrambler on the receive datapath (Default 1’b0)

9.7

RX_DESCRAMBLER_EN

1 = Enables De-scrambler on the receive datapath

7 bit De-scrambler seed used when RX De-scrambler is enabled.

9.6:0

RX_DESCRAMBLER_SEED[6:0]

(Default 7’b0000000)

PROGRAMMERS REFERENCE

Submit Documentation Feedback

Product Folder Link(s): TLK6002

TLK6002 Datasheet(PDF) 53 Page - Texas Instruments

TLK6002 Datasheet(HTML) 53 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98

Datasheet Download

Link URL