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TLK6002 Datasheet(PDF) 92 Page - Texas Instruments

Part # TLK6002
Description  Dual Channel 0.47Gbps to 6.25Gbps Multi-Rate Transceiver
PDF  98 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TLK6002 Datasheet(HTML) 92 Page - Texas Instruments

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TLK6002
SLLSE34A – MAY 2010 – REVISED AUGUST 2010
www.ti.com
Table 8-3. Device Static Latency Variance
TRANSMIT STATIC LATENCY VARIANCE – Maximum
8b/10b Encoder
Interface Mode
Serial Bit Times
Enabled
SDR
33
Enabled
DDR
33
Disabled
SDR
33
Disabled
DDR
33
Note: TX_FIFO_DEPTH[2:0] = 3'b000
RECEIVE STATIC LATENCY VARIANCE – Maximum
Receive FIFO
Channel
8b/10b Decoder
Serial Bit Times
Synchronization
Bypassed
Enabled
Enabled
30
Bypassed
Enabled
Disabled
30
Bypassed
Disabled
Disabled
20
Enabled
Enabled
Enabled
60
Table 8-4 shows the device dynamic latency variance. Note that the dynamic latency variation is the
difference in latency when voltage and temperature are varied for a particular absolute static latency, after
traffic (including channel synchronization) has been established. The dynamic latency variance numbers
do not include phase movement between the parallel input clocks and input reference clocks.
Table 8-4. Device Dynamic Latency Variance
Transmit Dynamic Latency Variance
Receive Dynamic Latency Variance
Minimum
Maximum
Minimum
Maximum
0 ns
2 ns
0 ns
2 ns
92
Appendix D – Device Latency Specification
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): TLK6002



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