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TLK6002 Datasheet(PDF) 63 Page - Texas Instruments |
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TLK6002 Datasheet(HTML) 63 Page - Texas Instruments |
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63 / 98 page  TLK6002 www.ti.com SLLSE34A – MAY 2010 – REVISED AUGUST 2010 4.3 Reference Clock Timing Requirement (REFCLK_0/1_P/N) PARAMETER CONDITION MIN NOM MAX UNIT Frequency 122.88 – 800 MHz Relative to Nominal Serial Data Rate –100 100 Accuracy ppm Relative to Incoming Serial Data Rate –200 200 Accuracy to TXCLK_A/B Synchronous (Multiple/Divide) 0 0 0 ppm Duty Cycle High Time 45% 50% 55% Jitter Random and deterministic 40 ps 4.4 Differential Reference Clock Electrical Characteristics (REFCLK_0/1_P/N) PARAMETER CONDITION MIN NOM MAX UNIT Vid Differential Input Voltage 250 2000 mVdfpp CIN Input Capacitance 3 pF RIN Input Differential Impedance 80 100 120 Ω Trise Rise Time 20% to 80% 50 600 ps 4.5 Differential Clock Output Electrical Characteristics (CLK_OUT_P/N) PARAMETER CONDITION MIN NOM MAX UNIT Vod Differential Output Voltage Peak to peak 1000 2000 mVdfpp TRise Output Rise Time 10 to 90% 2pF lumped C loadAC Coupled 180 ps RTERM Output Termination CLK_OUT_P/N to DVDD 40 50 60 Ω FMAX Output Frequency 0 625 MHz 4.6 LVCMOS Electrical Characteristics (VDDO = VDDO1/VDDO2/VDDO3) PARAMETER CONDITION MIN NOM MAX UNIT IOH = 2 mA, Driver Enabled (1.8 V) VDDO – 0.45 VDDO VOH High-level output voltage V IOH = 2 mA, Driver Enabled (1.5 V) 0.75×VDDO VDDO VOL IOL = –2 mA, Driver Enabled (1.8 V) 0 0.45 V Low-level output voltage IOL = –2 mA, Driver Enabled (1.5 V) 0 0.25×VDDO VIH High-level input voltage 0.65×VDDO VDDO+0.3 V VIL Low-level input voltage -0.3 0.35×VDDO V IIH, IIL Receiver Only Low/High Input Current ±170 µA Driver Only Driver Disabled ±25 µA IOZ Driver/Receiver With Pullup/Pulldown Driver DisabledWith Pull Up/Down ±195 µA Enabled CIN Input capacitance 3 pF 4.7 HSTL Signals Electrical Characteristics (VDDQA/B = 1.5/1.8V) PARAMETER CONDITION MIN NOM MAX UNIT VOH(dc) High-level output voltage VDDQA/B – 0.4 VDDQA/B + 0.3 V VOL(dc) Low-level output voltage 0.40 V VOH(ac) High-level output voltage VDDQA/B – 0.5 VDDQA/B + 0.3 V VOL(ac) Low-level output voltage 0.50 V VIH(dc) High-level DC input voltage DC input, logic high VREFTA/B+ 0.10 VDDQA/B + 0.3 V VIL(dc) Low-level DC input voltage DC input, logic low -0.30 VREFTA/B – 0.1 V VIH(ac) High-level AC input voltage AC input, logic high VREFTA/B + 0.20 VDDQA/B + 0.3 V Copyright © 2010, Texas Instruments Incorporated ELECTRICAL SPECIFICATIONS 63 Submit Documentation Feedback Product Folder Link(s): TLK6002 |
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