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DRV8353FS Datasheet(PDF) 3 Page - Texas Instruments |
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DRV8353FS Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 83 page  5 Device Comparison Table DEVICE VARIANT SHUNT AMPLIFIERS INTERFACE DRV8350F DRV8350FH 0 Hardware (H) DRV8350FS SPI (S) DRV8353F DRV8353FH 3 Hardware (H) DRV8353FS SPI (S) 6 Pin Configuration and Functions 1 CPH 24 INLA 2 VM 23 INHA 3 VDRAIN 22 ENABLE 4 VCP 21 NC 5 GHA 20 VDS 6 SHA 19 IDRIVE 7 GLA 18 MODE 8 SLA 17 nFAULT Not to scale Thermal Pad Figure 6-1. DRV8350FH RTV Package 32-Pin WQFN With Exposed Thermal Pad Top View 1 CPH 24 INLA 2 VM 23 INHA 3 VDRAIN 22 ENABLE 4 VCP 21 nSCS 5 GHA 20 SCLK 6 SHA 19 SDI 7 GLA 18 SDO 8 SLA 17 nFAULT Not to scale Thermal Pad Figure 6-2. DRV8350FS RTV Package 32-Pin WQFN With Exposed Thermal Pad Top View Pin Functions—32-Pin DRV8350F Devices PIN TYPE(1) DESCRIPTION NAME NO. DRV8350FH DRV8350FS CPH 1 1 PWR Charge pump switching node. Connect a X5R or X7R, 47-nF, VDRAIN-rated ceramic capacitor between the CPH and CPL pins. CPL 32 32 PWR Charge pump switching node. Connect a X5R or X7R, 47-nF, VDRAIN-rated ceramic capacitor between the CPH and CPL pins. DVDD 29 29 PWR 5-V internal regulator output. Connect a X5R or X7R, 1-µF, 6.3-V ceramic capacitor between the DVDD and GND pins. This regulator can source up to 10 mA externally. ENABLE 22 22 I Gate driver enable. When this pin is logic low the device goes to a low power sleep mode. An 8 to 40-µs pulse can be used to reset fault conditions. GHA 5 5 O High-side gate driver output. Connect to the gate of the high-side power MOSFET. GHB 12 12 O High-side gate driver output. Connect to the gate of the high-side power MOSFET. GHC 13 13 O High-side gate driver output. Connect to the gate of the high-side power MOSFET. GLA 7 7 O Low-side gate driver output. Connect to the gate of the low-side power MOSFET. GLB 10 10 O Low-side gate driver output. Connect to the gate of the low-side power MOSFET. GLC 15 15 O Low-side gate driver output. Connect to the gate of the low-side power MOSFET. GND 30 30 PWR Device primary ground. Connect to system ground. IDRIVE 19 — I Gate drive output current setting. This pin is a 7 level input pin set by an external resistor. INHA 23 23 I High-side gate driver control input. This pin controls the output of the high-side gate driver. INHB 25 25 I High-side gate driver control input. This pin controls the output of the high-side gate driver. INHC 27 27 I High-side gate driver control input. This pin controls the output of the high-side gate driver. INLA 24 24 I Low-side gate driver control input. This pin controls the output of the low-side gate driver. www.ti.com DRV8350F, DRV8353F SLVSFV1B – AUGUST 2018 – REVISED AUGUST 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: DRV8350F DRV8353F |
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