Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

DAC38RF86 Datasheet(PDF) 70 Page - Texas Instruments

Part # DAC38RF86
Description  DAC38RFxx Dual-Channel, Single-Ended, 14-Bit, 6- and 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip GSM PLL
PDF  147 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC38RF86 Datasheet(HTML) 70 Page - Texas Instruments

Back Button DAC38RF86 Datasheet HTML 66Page - Texas Instruments DAC38RF86 Datasheet HTML 67Page - Texas Instruments DAC38RF86 Datasheet HTML 68Page - Texas Instruments DAC38RF86 Datasheet HTML 69Page - Texas Instruments DAC38RF86 Datasheet HTML 70Page - Texas Instruments DAC38RF86 Datasheet HTML 71Page - Texas Instruments DAC38RF86 Datasheet HTML 72Page - Texas Instruments DAC38RF86 Datasheet HTML 73Page - Texas Instruments DAC38RF86 Datasheet HTML 74Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 70 / 147 page
background image
70
DAC38RF86, DAC38RF96
DAC38RF87, DAC38RF97
SLASEF4B – FEBRUARY 2017 – REVISED JULY 2017
www.ti.com
Product Folder Links: DAC38RF86 DAC38RF96 DAC38RF87 DAC38RF97
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Register Maps (continued)
Table 42. Register Summary (continued)
Address
Reset
Acronym
Register Name
Section
0x0B
0x0022
SLEEP_CONFIG
Sleep Configuration
8.5.70
0x0C
0xA002
CLK_OUT
Divided Output Clock Configuration
8.5.71
0x0D
0xF000
DACFS
DAC Fullscale Current
8.5.72
0x0E-0x0F
0x0000
Reserved
Reserved
0x10
0x0000
LCMGEN
Internal sysref generator
8.5.73
0x11
0x0000
LCMGEN_DIV
Counter for internal sysref generator
8.5.74
0x12
0x0000
LCMGEN_SPISYSREF
SPI SYSREF for internal sysref generator
8.5.75
0x13-0x1A
0x0000
Reserved
Reserved
0x1B
0x0000
DTEST
Digital Test Signals
8.5.76
0x1C-0x22
0x0000
Reserved
Reserved
0x23
0x03F3
SLEEP_CNTL
Sleep Pin Control
8.5.77
0x24
0x1000
SYSR_CAPTURE
SYSREF Capture Circuit Control
8.5.78
0x25-0x30
0x0000
Reserved
Reserved
0x31
0x0200
CLK_PLL_CFG
Clock Input and PLL Configuration
8.5.79
0x32
0x0308
PLL_CONFIG1
PLL Configuration 1
8.5.80
0x33
0x4018
PLL_CONFIG2
PLL Configuration 2
8.5.81
0x34
0x0000
LVDS_CONFIG
LVDS Output Configuration
8.5.82
0x35
0x0018
PLL_FDIV
Fuse farm clock divider
8.5.83
0x36-0x3A
0x0000
Reserved
Reserved
0x3B
0x0002
SRDS_CLK_CFG
Serdes Clock Configuration
8.5.84
0x3C
0x8228
SRDS_PLL_CFG
Serdes PLL Configuration
8.5.85
0x3D
0x0088
SRDS_CFG1
Serdes Configuration 1
8.5.86
0x3E
0x0909
SRDS_CFG2
Serdes Configuration 2
8.5.87
0x3F
0x0000
SRDS_POL
Serdes Polarity Control
8.5.88
0x40-0x75
0x0000
Reserved
Reserved
0x76
0x0000
SYNCBOUT
JESD204B SYNCB Output
8.5.89



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com