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DAC38RF86 Datasheet(PDF) 96 Page - Texas Instruments

Part # DAC38RF86
Description  DAC38RFxx Dual-Channel, Single-Ended, 14-Bit, 6- and 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip GSM PLL
PDF  147 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC38RF86 Datasheet(HTML) 96 Page - Texas Instruments

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96
DAC38RF86, DAC38RF96
DAC38RF87, DAC38RF97
SLASEF4B – FEBRUARY 2017 – REVISED JULY 2017
www.ti.com
Product Folder Links: DAC38RF86 DAC38RF96 DAC38RF87 DAC38RF97
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
8.5.41 JESD Error Counter Register (address = 0x41) [reset = 0x0000]
Figure 101. JESD Error Counter Register (JESD_ERR_CNT)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
x
R
R
R
R
R
R
R
R
7
6
5
4
3
2
1
0
0
1
0
0
0
0
0
1
R
R
R
R
R
R
R
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 83. JESD_ERR_CNT Field Descriptions
Bit
Field
Type
Reset
Description
15:0
JESD_ERR_CNT
R
0x0000
This is the error count for the JESD link. This is a 16bit value
that is not cleared until the JESD synchronization is required or
errcnt_clr is programmed to '1'
8.5.42 JESD ID 1 Register (address = 0x46) [reset = 0x0044]
Figure 102. JESD ID 1 Register (JESD_ID1)
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
x
R
R
R
R
R
R
R
R
7
6
5
4
3
2
1
0
0
1
0
0
0
1
1
0
R
R
R
R
R
R
R
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 84. JESD_ID1 Field Descriptions
Bit
Field
Type
Reset
Description
15:11
LID0
R/W
00000
JESD ID for lane 0
10:6
LID1
R/W
00001
JESD ID for lane 1
5:1
LID2
R/W
00010
JESD ID for lane 2
0
Reserved
R/W
0
Reserved



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