LPC3240 datasheet(47/80 Pages) NXP

47 / 80 page

LPC3220_30_40_50

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Product data sheet

Rev. 2.1 — 24 June 2014

47 of 80

NXP Semiconductors

LPC3220/30/40/50

16/32-bit ARM microcontrollers

Power consumption in Run, direct Run, and Stop modes

IDD(run)

Run mode supply

current

Tamb =25 C;

code

while(1){}

executed from IRAM; all

peripherals enabled

I-cache/D-cache, MMU

enabled; CPU

clock = 208 MHz;

VDD_CORE = 1.2 V

150

I-cache/D-cache, MMU

enabled; CPU

clock = 266 MHz;

VDD_CORE = 1.35 V

218

I-cache/D-cache, MMU

disabled; CPU

clock = 208 MHz;

VDD_CORE = 1.2 V

-78

I-cache/D-cache, MMU

disabled; CPU

clock = 266 MHz;

VDD_CORE = 1.35 V

111

IDD(drun)

direct Run mode supply

current

Tamb =25 C; CPU

clock = 13 MHz;

code

while(1){}

executed from IRAM; all

peripherals disabled

I-cache/D-cache, MMU

enabled;

VDD_CORE = 1.2 V

-7.8

I-cache/D-cache, MMU

enabled;

VDD_CORE = 0.9 V

-5.6

I-cache/D-cache, MMU

disabled;

VDD_CORE = 1.2 V

-5

I-cache/D-cache, MMU

disabled;

VDD_CORE = 0.9 V

-3.5

IDD(stop)

Stop mode supply

current

Tamb =25 C; CPU

clock stopped internally; all

peripherals disabled

VDD_CORE = 1.2 V

400

A

VDD_CORE = 0.9 V

400

A

Table 8.

Static characteristics …continued

Tamb = 40 C to +85 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

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