LPC3240 datasheet(52/80 Pages) NXP

52 / 80 page

LPC3220_30_40_50

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Product data sheet

Rev. 2.1 — 24 June 2014

52 of 80

NXP Semiconductors

LPC3220/30/40/50

16/32-bit ARM microcontrollers

[1]

Typical ratings are not guaranteed. The values listed are at room temperature (25

C), nominal supply voltages.

[2]

Applies to VDD_CORE pins.

[3]

Applies to pins VDD_RTC, VDD_RTCCORE, and VDD_RTCOSC.

[4]

Applies to pins VDD_COREFXD, VDD_OSC, VDD_PLL397, VDD_PLLHCLK, and VDD_PLLUSB.

[5]

Applies when using 1.8 V Mobile DDR or Mobile SDR SDRAM.

[6]

Applies when using 2.5 V DDR memory.

[7]

Applies when using 3.3 V SDR SDRAM and SRAM.

[8]

Specifies current on combined VDD_RTCx during normal chip operation: VDD_RTC, VDD_CORE, VDD_OSC = 1.2 V and

VDD_CORE, VDD_IOx at typical voltage.

[9]

Specifies current on combined VDD_RTCx during backup operation: VDD_RTC, VDD_CORE, VDD_OSC = 1.2 V and all other VDD_x

at 0 V.

[10] Referenced to the applicable VDD for the pin.

[11] Including voltage on outputs in 3-state mode.

[12] The applicable VDD voltage for the pin must be present.

[13] 3-state outputs go into 3-state mode when the applicable VDD voltage for the pin is grounded.

[14] Accounts for 100 mV voltage drop in all supply lines.

[15] Allowed as long as the current limit does not exceed the maximum current allowed by the device.

IIH

HIGH-level input current VI = VDD; no pull-down

[10] --

A

IOZ

OFF-state output current VO = 0 V; VO =VDD;

no pull-up/down

[10] --

A

Ilatch

I/O latch-up current

(1.5V

DD) < VI < (1.5VDD)

[10] --

100

Table 8.

Static characteristics …continued

Tamb = 40 C to +85 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

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