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LPC3240 Datasheet(PDF) 57 Page - NXP Semiconductors |
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LPC3240 Datasheet(HTML) 57 Page - NXP Semiconductors |
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57 / 80 page  LPC3220_30_40_50 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 2.1 — 24 June 2014 57 of 80 NXP Semiconductors LPC3220/30/40/50 16/32-bit ARM microcontrollers 11. Dynamic characteristics 11.1 Clocking and I/O port pins [1] Parameters are valid over operating temperature range unless otherwise specified. [2] After supply voltages are stable [3] Supplied by an external crystal. 11.2 Static memory controller Table 11. Dynamic characteristics Tamb = 40 C to +85 C, unless otherwise specified.[1] Symbol Parameter Conditions Min Typ Max Unit Reset tw(RESET)ext external RESET pulse width [2] 10 - - ms External clock fext external clock frequency [3] 113 20 MHz Port pins tr rise time - 5 - ns tf fall time - 5 - ns Table 12. Dynamic characteristics: static external memory interface CL =25 pF, Tamb =20 C, VDD(EMC) = 1.8 V, 2.5 V, or 3.3 V. Symbol Parameter Notes Min Typ Max Unit Common to read and write cycles TCLCL clock cycle time [1] 7.5 9.6 - ns tCSLAV CS LOW to address valid time - 0 - ns Read cycle parameters tOELAV OE LOW to address valid time [2] -0 WAITOEN T CLCL -ns tBLSLAV BLS LOW to address valid time [2] -0 WAITOEN T CLCL -ns tCSLOEL CS LOW to OE LOW time - 0 + WAITOEN T CLCL -ns tCSLBLSL CS LOW to BLS LOW time [2] - 0 + WAITOEN T CLCL -ns tOELOEH OE LOW to OE HIGH time [2][3] -(WAITRD WAITOEN + 1) T CLCL -ns tBLSLBLSH BLS LOW to BLS HIGH time [2][3] -(WAITRD WAITOEN + 1) T CLCL -ns tsu(DQ) data input/output set-up time [6] -8.4 - ns th(DQ) data input/output hold time [6] -0 - ns tCSHOEH CS HIGH to OE HIGH time - 0 - ns tCSHBLSH CS HIGH to BLS HIGH time - 0 - ns tOEHANV OE HIGH to address invalid time - 1 T CLCL -ns tBLSHANV BLS HIGH to address invalid time - 1 T CLCL -ns Write cycle parameters tCSLDV CS LOW to data valid time - 0 - ns tCSLWEL CS LOW to WE LOW time [4] -(WAITWEN + 1) T CLCL -ns tCSLBLSL CS LOW to BLS LOW time [4] -(WAITWEN + 1) T CLCL -ns tWELDV WE LOW to data valid time [4] -0 (WAITWEN + 1) T CLCL -ns |
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