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LPC3240 Datasheet(PDF) 48 Page - NXP Semiconductors |
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LPC3240 Datasheet(HTML) 48 Page - NXP Semiconductors |
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48 / 80 page ![]() LPC3220_30_40_50 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 2.1 — 24 June 2014 48 of 80 NXP Semiconductors LPC3220/30/40/50 16/32-bit ARM microcontrollers IDD(RTC) RTC supply current normal operation; VDD_RTC = VDD_RTCCORE = VDD_RTCOSC = 1.2 V; Tamb =25 C [8] -13 - A RTC back up operation; Rev “-” silicon [9] -30 - A Rev “A” silicon [9] -4 - IDD supply current for HCLK; PLL output frequency = 266 MHz; VDD_PLLHCLK = 1.2 V -2 - mA for USB; VDD_PLLUSB = 1.2 V -2 - mA for ADC; interrupt driven loop converting ADIN[2:0]; VDD_AD = 3.3 V - 1- mA Input pins and I/O pins configured as input VI input voltage [10][12] 0- VDD(IO) V VIH HIGH-level input voltage 1.8 V inputs 0.7 V DD(IO) -- V 3.3 V inputs 0.7 V DD(IO) -- V VIL LOW-level input voltage 1.8 V inputs - - 0.3 V DD(IO) V 3.3 V inputs - - 0.3 V DD(IO) V Vhys hysteresis voltage 1.8 V inputs 0.1 V DD(IO) -- V 3.3 V inputs 0.1 V DD(IO) -- V IIL LOW-level input current VI = 0 V; no pull-up - - 1 A IIH HIGH-level input current VI = VDD(IO); no pull-down [10] -- 1 A Ilatch I/O latch-up current (1.5V DD(IO)) < VI < (1.5VDD(IO)) [10] -- 100 mA Ipu pull-up current 1.8 V inputs with pull-up; VI = 0 V 612 22 A 3.3 V inputs with pull-up; VI = 0 V 25 50 80 A Ipd pull-down current 1.8 V inputs with pull-down; VI = VDD(IO) 512 22 A 3.3 V inputs with pull-down; VI = VDD(IO) 25 50 85 A II input current bus keeper inputs; VI = VDD -- 1 A VI = 0.67 VDD -- 55 A VI = 0.33 VDD -- 60 A VI = 0 V - - 1 A Ci input capacitance Excluding bonding pad capacitance -- 3.3 pF Table 8. Static characteristics …continued Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit |
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