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LAN8804D Datasheet(PDF) 40 Page - Microchip Technology |
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LAN8804D Datasheet(HTML) 40 Page - Microchip Technology |
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40 / 89 page ![]() LAN8804D DS00003591K-page 40 © 2026 Microchip Technology Inc. and its subsidiaries The MSE value is compared to the thresholds set in the DCQ SQI Table Registers to provide an SQI value between 0 (worst value) and 7 (best value) as follows: In order to capture the SQI value, the DCQ Read Capture bit in the DCQ Configuration register needs to be written as a high with the desired cable pair specified in the DCQ Channel Number field of the same register. The DCQ Read Cap- ture bit will immediately self-clear and the result will be available in the DCQ SQI register. In addition to the current SQI, the worst case (lowest) SQI since the last read is available in the SQI Worst Case field. The correlation between the SQI values stored in the DCQ SQI register and an according Signal to Noise Ratio (SNR) based on Additive White Gaussian (AWG) noise (bandwidth of 80 MHz @ 100 Mbps / 550 MHz @ 1000 Mbps) is shown in Table 5-4 and Table 5-5. The bit error rates to be expected in the case of white noise as interference signal is shown in the table as well for information purposes. A link loss only occurs if the SQI value is 0. TABLE 5-3: MSE TO SQI MAPPING MSE Value SQI Value Greater Than Less Than or Equal To — SQI_TBL7.SQI_VALUE 7 SQI_TBL7.SQI_VALUE SQI_TBL6.SQI_VALUE 6 SQI_TBL6.SQI_VALUE SQI_TBL5.SQI_VALUE 5 SQI_TBL5.SQI_VALUE SQI_TBL4.SQI_VALUE 4 SQI_TBL4.SQI_VALUE SQI_TBL3.SQI_VALUE 3 SQI_TBL3.SQI_VALUE SQI_TBL2.SQI_VALUE 2 SQI_TBL2.SQI_VALUE SQI_TBL1.SQI_VALUE 1 SQI_TBL1.SQI_VALUE — 0 TABLE 5-4: 1000M SQI PERFORMANCE SQI Value Link State Bit Error Rate (BER) 7Up < 10-10 No frame drops 6Up 5Up 4Up > 10-10 Frame drops may occur 3Up 2Up 1Up 0 Intermittent / Down Heavy frame drops may occur |
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