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TCC76 Datasheet(PDF) 26 Page - List of Unclassifed Manufacturers

Part # TCC76
Description  32-bit RISC Microprocessor For Digital Media Player
PDF  259 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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TCC76 Datasheet(HTML) 26 Page - List of Unclassifed Manufacturers

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TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
INTRODUCTION
Preliminary
1-16
1.4.3 TCC763 / TCC764 Pin Description
Table 1.5 TCC763 / TCC764 Pin Description
Signal Name
Shared Signal
Ball
Type Description – TCC763/ TCC764
External Memory Interface Pins
SD_CKE
GPIO_B[0]
J8
I/O
SDRAM Clock Enable signal. Active high. / GPIO_B[0]
SD_CLK
GPO
L5
I/O
SDRAM Clock / GPO. SD_CLK can be used as a general
purpose output. Refer to section “MEMORY CONTROLLER”.
(MCFG register Bit[3] and Bit[1])
SD_nCS
SD_nCLK / GPIO_B[1]
L6
I/O
Chip select signal for SDRAM, Active low / Inverted SD_CLK for
DDR SDRAM / GPIO_B[1]
XA[21:20]
DQM[0:1]
L4,K4
I/O
External Bus Address Bit [21:20] / Data I/O Mask 0, 1
XA[19:18]
DQS[1:0]
K3,L2
I/O
External BusAddress Bit [19:18] / DDR SDRAM Data Strobe [1:0]
XA[17]
ND_CLE
L3
I/O
External Bus Address Bit [17] / CLE for NAND Flash
XA[16]
SD_nRAS / ND_ALE
G3
I/O
External Bus Address Bit [16] / SDRAM RAS signal / ALE
for NAND Flash
XA[15]
SD_nCAS
M3
I/O
External Bus Address Bit [15] / SDRAM CAS signal
XA[14]
SD_BA[1]
M2
I/O
External Bus Address Bit [14] / SDRAM Bank Address 1
XA[13]
SD_BA[0]
M1
I/O
External Bus Address Bit [13] / SDRAM Bank Address 0.
XA[12:0]
J4, K2
M4, J1
H4, H5
H1, G6
H2, G5
G4, G7
G8
I/O
External Bus Address Bits [12:0]
XD[15:0],
A3, F4
E2, E5
D8, F7
E1, F6
E3, D4
C2, B1
A7, B2
A10, F8
I/O
External Bus Data Bit [15:0]
NCS[3]
ND_nOE[3] / GPIO_B[5]
H6
I/O
NCS[2]
ND_nOE[2] / GPIO_B[4]
J6
I/O
NCS[1]
ND_nOE[1] / GPIO_B[3]
K6
I/O
NCS[0]
ND_nOE[0] / GPIO_B[2]
J5
I/O
External Bus Chip Select [3:0] / NAND Flash Output Enable
[3:0] / GPIO_B[5:2]
ND_nWE
GPIO_B[7]
L10
I/O
NAND flash WE.Active low. / GPIO_B[7]
nWE
M5
I/O
Static Memory Write Enable signal. Active low.
nOE
H7
I/O
Static Memory Output Enable signal. Active low.
READY
J11
I
Ready information from external device.
FCSN
A12
I
NOR Flash Chip Select. Should be connected to nCS[3].
USB/UART/IrDA Interface Pins
USB_DP
GPIO_B[26]
L7
I/O
USB Function D+ signal / GPIO_B[26]
USB_DN
GPIO_B[27]
K8
I/O
USB Function D- signal / GPIO_B[27]
USBH_DP
GPIO_B[28]
L8
I/O
USB Host D+ signal / GPIO_B[28]
USBH_DN
GPIO_B[29]
M9
I/O
USB Host D- signal / GPIO_B[29]
UT_TX
GPIO_B[8] / SD_nCS
M10
I/O
UART or IrDA TX data / GPIO_B[8] / DDR SDRAM Chip
Select
UT_RX
GPIO_B[9] / IDE_nCS1
L9
I/O
UART or IrDARX data / GPIO_B[9] / IDE Chip Select 1
Audio Interface Pins



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