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TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
ADDRESS & REGISTER MAP
Preliminary
2-8
Table 2.10 UART/IrDA Register Map (Base = 0x80000600)
Name
Address
Type
Reset
Description
UTRXD
0x00
R
Unknown
Receiver Buffer Register
UTTXD
0x00
W
Unknown
Transmitter Holding Register
UTDL
0x04
W
0x0000
Divisor Latch Register
UTIR
0x08
R/W
0x000
Interrupt Register
UTCR
0x0C
R/W
0x000
UART Control Register
UTLSR
0x10
R
0x0101
Status Register
IrDACFG1
0x14
R/W
0x0003
IrDA Configuration Register 1
IrDACFG2
0x18
R/W
0x4da1
IrDA Configuration Register 2
Table 2.11 GSIO Register Map (Base = 0x80000700)
Name
Address
Type
Reset
Description
GSDO0
0x00
R/W
Unknown
GSIO0 Output Data Register
GSDI0
0x04
R/W
Unknown
GSIO0 Input Data Register
GSCR0
0x08
R/W
0x0000
GSIO0 Control Register
GSGCR
0x0C
R/W
0x0000
GSIO Global Control Register
GSDO1
0x10
R/W
Unknown
GSIO1 Output Data Register
GSDI1
0x14
R/W
Unknown
GSIO1 Input Data Register
GSCR1
0x18
R/W
0x0000
GSIO1 Control Register
GSDO2
0x20
R/W
Unknown
GSIO2 Output Data Register
GSDI2
0x24
R/W
Unknown
GSIO2 Input Data Register
GSCR2
0x28
R/W
0x0000
GSIO2 Control Register
GSDO3
0x30
R/W
Unknown
GSIO3 Output Data Register
GSDI3
0x34
R/W
Unknown
GSIO3 Input Data Register
GSCR3
0x38
R/W
0x0000
GSIO3 Control Register
Table 2.12 I2C Register Map (Base Address = 0x80000800)
Name
Address
Type
Reset
Description
PRES
0x00
RW
0xFFFF
Clock Prescale register
CTRL
0x04
RW
0x0000
Control Register
TXR
0x08
W
0x0000
Transmit Register
CMD
0x0C
W
0x0000
Command Register
RXR
0x10
R
0x0000
Receive Register
SR
0x14
R
0x0000
Status Register
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