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TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
ADDRESS & REGISTER MAP
Preliminary
2-2
Table 2.2 Address Allocations for Internal Peripherals (Base = 0x80000000)
Offset Address Space
Peripheral
0x000 ~ 0x0FF
DAI & CDIF
0x100 ~ 0x1FF
Interrupt Controller
0x200 ~ 0x2FF
Timer Counter
0x300 ~ 0x3FF
GPIO
0x400 ~ 0x4FF
Clock Generator & Power Management
0x500 ~ 0x5FF
USB1.1 Device
0x600 ~ 0x6FF
UART/IrDA
0x700 ~ 0x7FF
GSIO (General Purpose Serial Input/Output)
0x800 ~ 0x8FF
I2C
0x900 ~ 0x9FF
ECC
0xA00 ~ 0xAFF
ADC Control & Etc.
0xB00 ~ 0xBFF
Camera Interface
0xC00 ~ 0xCFF
Reserved
0xD00 ~ 0xDFF
USB1.1 Host
0xE00 ~ 0xEFF
DMA Controller
0xF00 ~ 0xFFF
LCD controller (TCC761 only)
Address decoding logic only monitors base address (for example, 0x8xxxxxxx, 0x4xxxxxxx, etc.), and
bit11~bit8 of accessing address bus. There can be a lot of mirror images of address space that are repeated
at every 4Kbyte boundary, user can access certain registers by these mirror images also, so care must be
taken not to modify these registers unintentionally.
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