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IMX95CEC Datasheet(PDF) 21 Page - NXP Semiconductors

Part # IMX95CEC
Description  i.MX 95 Applications Processors Data Sheet for Commercial Products
PDF  124 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

IMX95CEC Datasheet(HTML) 21 Page - NXP Semiconductors

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Table 17. The power supply states...continued
Power rail
OFF
BBSM
SUSPEND
IDLE
RUN/LP RUN
SUSPEND
(With
VDD_DDR_0P8
OFF)
VDD_LVDS_1P
8
VDD_MIPI_1P8
VDD_PCI_1P8
OFF
OFF
ON
ON
ON
ON
VDD_USB_1P8
VDD_USB_3P3
OFF
OFF
ON
ON
ON
ON
[1] When SoC in a low power state, it can save more power when configuring PMIC to turn VDD_ARM off vs having the PMIC continue to supply VDD_ARM and rely
on the on-die powergating around the CORTEXAMIX components.
[2] Only VDD_DDR_0P8 is OFF
4.1.5.2 Low power modes
The following table shows the state of each module in Idle mode, Suspend mode, and BBSM mode.
Table 18. Module states in low-power modes
Module
Idle
Suspend
BBSM
CCM LPM mode
Wait
Stop
N/A
Arm A55 CPU0*
Off
Off
Off
Shared L3 cache
On
Off
Off
CAMERAMIX
DISPLAYMIX
GPUMIX
NPUMIX
VPUMIX
M7MIX
On as needed
Off
Off
DRAM controller and PHY
On
Off
Off
ARM_PLL
Off
Off
Off
DRAM_PLL
Off
Off
Off
SYSTEM_PLL1
On
Off
Off
XTAL
On
Off
Off
RTC
On
On
On
External DRAM device
Self-Refresh mode
Self-Refresh mode
Off
DRAM clock
266 MHz
Off
Off
AXI clock
133 MHz
Off
Off
Table continues on the next page...
NXP Semiconductors
IMX95CEC
i.MX 95 Applications Processors Data Sheet for Commercial Products
IMX95CEC
All information provided in this document is subject to legal disclaimers.
© 2026 NXP B.V. All rights reserved.
Product data sheet
Rev. 8 — 7 April 2026
Document feedback
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