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4.11.4 RGMII inteface

This section describes the electrical characteristics for the RGMII interface.

4.11.4.1 RGMII DC Electrical Characteristics at (voltage rail) ≥ 1.8V

The timings assume the following configuration: CTL[5:0] = 001111 and SL[1:0] = 11. Measured as defined in EIA/JESD 8-6 1995

with a timing threshold voltage of VDDQ/2. Output timing valid for maximum external load CL = 15 pF, which is assumed to be a 10

pF load at the end of a 50 ohm, unterminated, 5-inch microstrip trace on standard FR4 (3.3 pF/inch), (15 pF total with margin). For

best signal integrity, the series resistance in the transmission line should be equal to the selected RDSON of the I/O pad output

driver. RGMII timing specifications are only valid for 1.8 V nominal I/O pad supply voltage. The following timing specifications meet

the requirements for RGMII interfaces for a range of transceiver device

Timing is valid for RGMII unless stated otherwise.

Table 82. RGMII Electrical Characteristics at (voltage rail) ≥ 1.8V

Symbol

Description

Min

Typ

Max

Unit

Condition

VIH

Input high voltage [1]

0.7 x

SUPPLY

—

VIL

Input low voltage [1]

—

0.3 x

SUPPLY

—

IIN

Input current (VIN=0 or VIN =

SUPPLY_IN) [2]

—

±50

μA

—

VOH

Output high voltage (SUPPLY =

min, IOH = -0.1 mA) [2]

SUPPLY

- 0.2

—

VOL

Output low voltage (SUPPLY =

min, IOL = 0.1 mA) [2]

—

0.2

—

[1] The min VIL and max VIH values are based on the respective min and max (supply) values found in Recommended Operating Conditions.

[2] The symbol (supply) represents the recommended operating voltage of the supply referenced in Recommended Operating Conditions.

4.11.4.2 RGMII AC Timing Specifications

Timing is valid for RGMII unless stated otherwise.

Table 83. RGMII AC Timing Specifications

Symbol

Description

Min

Typ

Max

Unit

Condition

Spec

Number

tSKRGTTX

Data to clock

output skew (at

transmitter) [1]

-500

500

—

tSKRGTRX

Data to clock input

skew (at receiver) [2]

—

2.6

—

tRGT

Clock period

duration [3]

7.2

8.8

—

tRGTHtRGT

Duty cycle for

10BASE-T and

100BASE-TX [3][4]

—

tRGTHtRGTgig

Duty cycle for

Gigabit

—

Table continues on the next page...

NXP Semiconductors

IMX95CEC

i.MX 95 Applications Processors Data Sheet for Commercial Products

IMX95CEC

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 7 April 2026

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