IMX95CEC datasheet(4/124 Pages) NXP

4 / 124 page

Table 1. Feature summary...continued

Subsystem

Features

• 2 x Medium Quality Sound (MQS)

Connectivity

• 19 x 19 mm package with 2x 1-lane PCIe Gen 3.0 and 15 x 15 mm package

with 1x 1-lane PCIe Gen3.0

• 1x USB3.0 Type C with PHY

• 1x USB2.0 with PHY

• 2x 1 Gbps Ethernet ports with Time Sensitive Networking (TSN) capabilities

• 1x 10 Gbps Ethernet port with Time Sensitive Networking (TSN) capabilities for 19

x 19 mm package only

• IEEE 1588 for sync; and EEE

• 5x CAN-FD

• 2x 32-pin FLEXIO interfaces (bus or serial I/O)

Low Speed

Communication Peripherals

• 8x UART

Timer and PWMs

• 2x Low Power Periodical Interrupt Timers (LPIT)

— 4-channel

— 4 external trigger sources

— Generic 32-bit resolution timer

— Periodical interrupt generation

• 6x Timer/PWM modules (TPM)

— Prescaler divide-by 1, 2, 4, 8, 16, 32, 64, or 128

— 16-bit counter, support free-running counter or modulo counter mode,

counting up or down

— Includes 6 channels that can be configured for input capture, output

compare, edge-aligned PWM mode, or center-aligned PWM mode

• 2x Low-Power Timers (LPTMR)

• 5x WatchDog modules (WDOG)

• 1x System Counter (SYS_CTR)

• 1x Timestamp Timer (TSTMR)

• 1x General Purpose Timer (GPT)

GPIO and Pin Multiplexing

• General-purpose input/output (GPIO) modules with interrupt capability

• Input/Output Multiplexing Controller (IOMUXC) to provide centralized pad

control

Analog

• FRO Clock Generator (FRO_TUNER)

• 2x Temperature Sensor (TEMPSENSE)

Table continues on the next page...

NXP Semiconductors

IMX95CEC

i.MX 95 Applications Processors Data Sheet for Commercial Products

IMX95CEC

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 7 April 2026

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