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SLRC400 Datasheet(PDF) 79 Page - NXP Semiconductors

Part # SLRC400
Description  I쨌CODE Reader IC
PDF  130 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SLRC400 Datasheet(HTML) 79 Page - NXP Semiconductors

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Philips Semiconductors
Product Specification Rev. 2.0 November 2001
I
•CODE Reader IC
SL RC400
79
Preliminary
10
POWER REDUCTION MODES
10.1
Hard Power Down
A Hard Power Down is enabled with HIGH on pin RSTPD. This turns off all internal current sinks including
the oscillator. All digital input buffers are separated from the input pads and defined internally (except pin
RSTPD itself). The output pins are frozen at a certain value.
This is shown in the following table:
SYMBOL
PIN
TYPE
DESCRIPTION
OSCIN
1
I
Not separated from input, pulled to AVSS
IRQ
2
O
High impedance
RFU
3
I
Separated from Input
SIGOUT
4
O
LOW
TX1
5
O
HIGH
TX2
7
O
LOW
NWR
9
I
Separated from Input
NRD
10
I
Separated from Input
NCS
11
I
Separated from Input
D0 to D7
13 to 20
I/O
Separated from Input
ALE
21
I
Separated from Input
A0
22
I/O
Separated from Input
A1
23
I
Separated from Input
A2
24
I
Separated from Input
AUX
27
O
High impedance
RX
29
I
Not changed
VMID
30
A
Pulled to AVDD
RSTPD
31
I
Not changed
OSCOUT
32
O
HIGH
Table 10-1: Signal on Pins during Hard Power Down
10.2
Soft Power Down
This mode is immediately entered by setting bit PowerDown in the Control-Register. All internal current sinks
are switched off (including the oscillator buffer).
Different from the Hard Power Down Mode, the digital input buffers are not separated from the input pads but
keep their functionality. The digital output pins do not change their state.
After resetting bit PowerDown in the Control-Register it needs 512 clocks until the Soft Power Down mode is
left. This is indicated by the PowerDown bit itself. Resetting it does not immediately clear it, but it is cleared
automatically by the SL RC400 when the Soft Power Down Mode is left.
Note: If the internal oscillator is used, you have to take into account that it is supplied by AVDD and it will
take a certain time tosc until the oscillator is stable.



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