21150 datasheet(97/164 Pages) INTEL

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21150

Preliminary Datasheet

10.0

General-Purpose I/O Interface

The 21150 implements a 4-pin general-purpose I/O gpio interface. During normal operation, the

gpio interface is controlled by device-specific configuration registers. In addition, the gpio

interface can be used for the following functions:

• During secondary interface reset, the gpio interface can be used to shift in a 16-bit serial

stream that serves as a secondary bus clock disable mask.

• A live insertion bit can be used, along with the gpio<3> pin, to bring the 21150 gracefully to a

halt through hardware, permitting live insertion of option cards behind the 21150.

10.1

gpio Control Registers

During normal operation, the gpio interface is controlled by the following device-specific

configuration registers:

• The gpio output data register

• The gpio output enable control register

• The gpio input data register

These registers consist of five 8-bit fields:

• Write-1-to-set output data field

• Write-1-to-clear output data field

• Write-1-to-set signal output enable control field

• Write-1-to-clear signal output enable control field

• Input data field

The bottom 4 bits of the output enable fields control whether each gpio signal is input only or

bidirectional. Each signal is controlled independently by a bit in each output enable control field. If

a 1 is written to the write-1-to-set field, the corresponding pin is activated as an output. If a 1 is

written to the write-1-to-clear field, the output driver is tristated, and the pin is then input only.

Writing zeros to these registers has no effect. The reset state for these signals is input only.

The input data field is read only and reflects the current value of the gpio pins. A type 0

configuration read operation to this address is used to obtain the values of these pins. All pins can

be read at any time, whether configured as input only or as bidirectional.

The output data fields also use the write-1-to-set and write-1-to-clear method. If a 1 is written to the

write-1-to-set field and the pin is enabled as an output, the corresponding gpio output is driven

high. If a 1 is written to the write-1-to-clear field and the pin is enabled as an output, the

corresponding gpio output is driven low. Writing zeros to these registers has no effect. The value

written to the output register will be driven only when the gpio signal is configured as bidirectional.

A type 0 configuration write operation is used to program these fields. The reset value for the

output is 0.

21150 Datasheet(PDF) 97 Page - Intel Corporation