| Electronic Components Datasheet Search |
|
21150 Datasheet(PDF) 39 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
21150 Datasheet(HTML) 39 Page - Intel Corporation |
|
39 / 164 page ![]() 21150 Preliminary Datasheet 31 The 21150 ends the transaction on the target bus when one of the following conditions is met: • All posted write data has been delivered to the target. • The target returns a target disconnect or target retry (the 21150 starts another transaction to deliver the rest of the write data). • The target returns a target abort (the 21150 discards remaining write data). • The master latency timer expires, and the 21150 no longer has the target bus grant (the 21150 starts another transaction to deliver remaining write data). Section 4.8.3.2 provides detailed information about how the 21150 responds to target termination during posted write transactions. Figure 6. Flow-Through Posted Memory Write Transaction 86% LJ-04843.AI4 p_frame_l p_cbe_l p_ad p_irdy_l p_devsel_l p_trdy_l p_stop_l s_frame_l s_cbe_l s_ad s_irdy_l s_devsel_l s_trdy_l s_stop_l p_clk s_clk Cycle CY0 < 15ns > CY1 CY2 CY3 CY4 CY5 CY6 CY7 CY8 CY10 CY9 CY11 CY12 CY13 CY14 CY15 CY16 CY17 Addr Data Data Data Data Data Data Data Data 7 Byte Enables Byte Enables Addr 7 Data Data Data Data Data Data Data Data Data Data Data Data |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |