Data Sheet

ADG714/ADG715

Rev. E | Page 7 of 21

Parameter

+25°C

−40°C to +85°C

Unit

Test Conditions/Comments

Off Switch Source Capacitance, CS (OFF)

11

pF typ

Off Switch Drain Capacitance, CD (OFF)

11

pF typ

On Switch Capacitance, C D (ON), C S (ON)

22

pF typ

POWER REQUIREMENTS

VDD = +2.75 V, VSS = −2.75 V

Positive Power Supply Current, IDD

15

µA typ

Digital inputs = 0 V or VDD

25

µA max

Negative Power Supply Current, ISS

15

µA typ

25

µA max

TIMING CHARACTERISTICS

ADG714

VDD = 2.7 V to 5.5 V. All specifications are from −40°C to +85°C, unless otherwise noted. See Figure 3. All input signals are specified with

tR = tF = 5 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2.

Table 4.

Parameter

Limit at TMIN, TMAX

Unit

Conditions/Comments

fSCLK

30

MHz max

SCLK cycle frequency

t1

33

ns min

SCLK cycle time

t2

13

ns min

SCLK high time

t3

13

ns min

SCLK low time

t4

0

ns min

SYNC to SCLK rising edge setup time

t5

5

ns min

Data setup time

t6

4.5

ns min

Data hold time

t7

0

ns min

SCLK falling edge to SYNC rising edge

t8

33

ns min

Minimum SYNC high time

t91

20

ns max

SCLK rising edge to DOUT valid

t10

0

ns min

SCLK falling edge to SYNC falling edge

t11

6

ns max

SYNC rising edge to SCLK rising edge

1

CL = 20 pF, RL = 1 kΩ.

ADG715

VDD = 2.7 V to 5.5 V. All specifications are from −40°C to +85°C, unless otherwise noted. See Figure 4.

Table 5.

Parameter

Limit at TMIN, TMAX

Unit

Conditions/Comments

fSCL

400

kHz max

SCL clock frequency

t1

2.5

µs min

SCL cycle time

t2

0.6

µs min

SCL high time, tHIGH

t3

1.3

µs min

SCL low time, tLOW

t4

0.6

µs min

Start/repeated start condition hold time, tHD, STA

t5

100

ns min

Data setup time, tSU, DAT

t61

0.9

µs max

Data hold time, tHD, DAT

0

µs min

t7

0.6

µs min

Setup time for repeated start, tSU, STA

t8

0.6

µs min

Stop condition setup time, tSU, STO

t9

1.3

µs min

Bus free time between a stop condition and a start condition, tBUF

t10

300

ns max

Rise time of both SCL and SDA when receiving, tR

20 + 0.1Cb2

ns min

t11

250

ns max

Fall time of SDA when receiving, tF

t11

300

ns max

Fall time of SDA when transmitting, tF

0.1Cb2

ns min