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HD404324FS Datasheet(PDF) 52 Page - Renesas Technology Corp |
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HD404324FS Datasheet(HTML) 52 Page - Renesas Technology Corp |
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52 / 103 page  HD404054 Series/HD404094 Series 50 T (N + 1) T 256 T T (256 – N) TMC13 = 0 The waveform is always fixed low when N = $FF. T: N: × × × TMC13 = 1 Input clock period to counter (figures 34 and 41) The value of the timer write register Notes: TMD13 = 0 TMD13 = 1 256 clock cycles 256 clock cycles Free-running timer Toggle output waveform (timers C, and D) PWM output waveform (timers C and D) (256 – N) clock cycles (256 – N) clock cycles Reload timer Figure 33 Timer Output Waveform |
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