HD404324FS datasheet(28/103 Pages) RENESAS

28 / 103 page

HD404054 Series/HD404094 Series

Stop mode

Oscillator

Internal

clock

STOP instruction execution

tres ≥ tRC (stabilization period)

tres

STOP

RESET

Figure 13 Timing of Stop Mode Cancellation

Stop Mode Cancellation by

STOPC: The MCU enters active mode from stop mode by inputting STOPC

as well as by

RESET. In either case, the MCU starts instruction execution from the starting address

(address 0) of the program. However, the value of the RAM enable flag (RAME: $021, bit 3) differs

between cancellation by

STOPC and by RESET. When stop mode is cancelled by RESET, RAME = 0;

when cancelled by

STOPC, RAME = 1. RESET can cancel all modes, but STOPC is valid only in stop

mode;

STOPC input is ignored in other modes. Therefore, when the program requires to confirm that stop

mode has been cancelled by

STOPC (for example, when the RAM contents before entering stop mode is

used after transition to active mode), execute the TEST instruction to the RAM enable flag (RAME) at the

beginning of the program.

MCU Operation Sequence: The MCU operates in the sequences shown in figures 14 to 16. It is reset by

an asynchronous

RESET input, regardless of its status.

The low-power mode operation sequence is shown in figure 16. With the IE flag cleared and an interrupt

flag set together with its interrupt mask cleared, if a STOP/SBY instruction is executed, the instruction is

cancelled (regarded as an NOP) and the following instruction is executed. Before executing a STOP/SBY

instruction, make sure all interrupt flags are cleared or all interrupts are masked.

HD404324FS Datasheet(PDF) 28 Page - Renesas Technology Corp