HD404324FS datasheet(56/103 Pages) RENESAS

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HD404054 Series/HD404094 Series

Timer D

Timer D Functions: Timer D has the following functions.

• Free-running/reload timer

• External event counter

• Timer output operation (toggle, 0, 1, and PWM outputs)

• Input capture timer

The block diagram for each operation mode of timer D is shown in figures 40-1 and 40-2.

Timer D Operations:

• Free-running/reload timer operation: The free-running/reload operation, input clock source, and

prescaler division ratio are selected by timer mode register D1 (TMD1: $010).

Timer D is initialized to the value set in timer write register D (TWDL: $011, TWDU: $012) by

software and incremented by one at each clock input. If an input clock is applied to timer D after it has

reached $FF, an overflow is generated. In this case, if the reload timer function is enabled, timer D is

initialized to its initial value set in timer write register D; if the free-running timer function is enabled,

the timer is initialized to $00 and then incremented again.

The overflow sets the timer D interrupt request flag (IFTD: $003, bit 0). IFTD is reset by software or

MCU reset. Refer to figure 3 and table 1 for details.

• External event counter operation: Timer D is used as an external event counter by selecting the

external event input as an input clock source. In this case, pin R4

0/EVND must be set to EVND by port

mode register C (PMRC: $025).

Either falling or rising edge, or both falling and rising edges of input signals can be selected as the

external event detection edge by detection edge select register 2 (ESR2: $027). When both rising and

falling edges detection is selected, the time between the falling edge and rising edge of input signals

must be 2t

cyc or longer.

Timer D is incremented by one at each detection edge selected by detection edge select register 2

(ESR2: $027). The other operation is basically the same as the free-running/reload timer operation.

• Timer output operation: The following four output modes can be selected for timer D by setting timer

mode register D2 (TMD2: $015).

Toggle

0 output

1 output

PWM output

By selecting the timer output mode, pin R3

2/TOD is set to TOD. The output from TOD is reset low by

MCU reset.

 Toggle output: The operation is basically the same as that of timer-C’s toggle output.

 0 output: The operation is basically the same as that of timer-C’s 0 output.

 1 output: The operation is basically the same as that of timer-C’s 1 output.

HD404324FS Datasheet(PDF) 56 Page - Renesas Technology Corp