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HD404324FS Datasheet(PDF) 97 Page - Renesas Technology Corp |
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HD404324FS Datasheet(HTML) 97 Page - Renesas Technology Corp |
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97 / 103 page ![]() HD404054 Series/HD404094 Series 95 During Transmit Clock Input Item Symbol Pin(s) Min Typ Max Unit Test Condition Note Transmit clock cycle time t Scyc SCK 1 1— — t cyc 1 Transmit clock high width t SCKH SCK 1 0.5 — — t Scyc 1 Transmit clock low width t SCKL SCK 1 0.5 — — t Scyc 1 Transmit clock rise time t SCKr SCK 1 — 100 — ns 1, 2 — — 80 ns 1, 3 Transmit clock fall time t SCKf SCK 1 — 100 — ns 1, 2 — — 80 ns 1, 3 Serial output data delay time t DSO SO 1 — — 500 ns Load shown in figure 73 1, 2 — — 200 ns 1, 3 Serial input data setup time t SSI SI 1 300 — — ns 1, 2 150 — — ns 1, 3 Serial input data hold time t HSI SI 1 300 — — ns 1, 2 150 — — ns 1, 3 Note: 1. Refer to figure72. 2. Applies to HD404052, HD404054, HD404092, HD404094, HD4074054, HD4074094. 3. Applies to HD40A4052, HD40A4054. |
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