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HD404324FS Datasheet(PDF) 60 Page - Renesas Technology Corp |
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HD404324FS Datasheet(HTML) 60 Page - Renesas Technology Corp |
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60 / 103 page ![]() HD404054 Series/HD404094 Series 58 Registers for Timer D Operation: By using the following registers, timer D operation modes are selected and the timer D count is read and written. Timer mode register D1 (TMD1: $010) Timer mode register D2 (TMD2: $015) Timer write register D (TWDL: $011, TWDU: $012) Timer read register D (TRDL: $011, TRDU: $012) Port mode register C (PMRC: $025) Detection edge select register 2 (ESR2: $027) • Timer mode register D1 (TMD1: $010): Four-bit write-only register that selects the free- running/reload timer function, input clock source, and the prescaler division ratio as shown in figure 41. It is reset to $0 by MCU reset. Writing to this register is valid from the second instruction execution cycle after the execution of the previous timer mode register D1 (TMD1: $010) write instruction. Setting timer D’s initialization by writing to timer write register D (TWDL: $011, TWDU: $012) must be done after a mode change becomes valid. When selecting the input capture timer operation, select the internal clock as the input clock source. Bit Initial value Read/Write Bit name 3 0 W TMD13 2 0 W TMD12 0 0 W TMD10 1 0 W TMD11 Timer mode register D1 (TMD1: $010) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 2048tcyc 512tcyc 128tcyc 32tcyc 8tcyc 4tcyc 2tcyc TMD12 TMD10 TMD11 Input clock period and input clock source R40/EVND (external event input) TMD13 0 1 Free-running/reload timer selection Free-running timer Reload timer Figure 41 Timer Mode Register D1 (TMD1) |
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