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HD404324FS Datasheet(PDF) 84 Page - Renesas Technology Corp |
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HD404324FS Datasheet(HTML) 84 Page - Renesas Technology Corp |
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84 / 103 page ![]() HD404054 Series/HD404094 Series 82 Addressing Modes RAM Addressing Modes The MCU has three RAM addressing modes, as shown in figure 64 and described below. AP 9 AP 0 W1 Y 0 W register X register Y register RAM address AP 9 AP 0 RAM address d 9 d 0 2nd word of Instruction Opcode 1st word of Instruction AP 9 AP 0 RAM address m 3 Opcode Instruction 00 010 0 AP 8 AP 7 AP AP 5 AP 4 6 AP 3 AP 2 AP 1 AP AP AP AP AP AP AP AP 8 7 6 543 2 1 d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 AP 8 AP 7 AP 6 AP 5 AP 4 AP 3 AP 2 AP 1 W0 X3 X2 X1 X0 Y 3 Y 2 Y 1 m 2 m 1 m 0 Direct addressing Memory register addressing Register direct addressing Figure 64 RAM Addressing Modes Register Indirect Addressing Mode: The contents of the W, X, and Y registers (10 bits in total) are used as a RAM address. Direct Addressing Mode: A direct addressing instruction consists of two words. The first word contains the opcode, and the contents of the second word (10 bits) are used as a RAM address. Memory Register Addressing Mode: The memory registers (MR), which are located in 16 addresses from $040 to $04F, are accessed with the LAMR and XMRA instructions. |
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