HD404324FS datasheet(17/103 Pages) RENESAS

17 / 103 page

HD404054 Series/HD404094 Series

Item

Abbr.

Initial

Value

Contents

Bit register

Watchdog timer on flag

(WDON) 0

Refer to description of timer C

Input capture status flag (ICSF)

Refer to description of timer D

Input capture error flag

(ICEF)

Refer to description of timer D

Others

Miscellaneous register

(MIS)

00 - -

Refer to description of operating modes, and

oscillator circuit

Notes: 1. The statuses of other registers and flags after MCU reset are shown in the following table.

2. X indicates invalid value. – indicates that the bit does not exist

Item

Abbr.

Status After

Cancellation of Stop

Mode by

STOPC Input

Status After

Cancellation of Stop

Mode by MCU Reset

Status After all Other

Types of Reset

Carry flag

(CA)

Pre-stop-mode values are not guaranteed;

values must be initialized by program

Pre-MCU-reset values

are not guaranteed;

values must be

initialized by program

Accumulator

(A)

B register

(B)

W register

(W)

X/SPX register

(X/SPX)

Y/SPY register

(Y/SPY)

Serial data register

(SRL, SRU)

RAM

Pre-stop-mode values are retained

RAM enable flag

(RAME)

Port mode register 1

bit 2

(PMRC12)

Pre-stop-mode values

are retained

Interrupts

The MCU has 6 interrupt sources: Two external signals (

INT

0, INT1), Three timer/counters (timers A, C,

and D), and one serial interface (serial 1).

An interrupt request flag (IF), interrupt mask (IM), and vector address are provided for each interrupt

source, and an interrupt enable flag (IE) controls the entire interrupt process.

Interrupt Control Bits and Interrupt Processing: Locations $000 to $003 and $020 to $021 in RAM are

reserved for the interrupt control bits which can be accessed by RAM bit manipulation instructions.

The interrupt request flag (IF) cannot be set by software. MCU reset initializes the interrupt enable flag

(IE) and the IF to 0 and the interrupt mask (IM) to 1.

HD404324FS Datasheet(PDF) 17 Page - Renesas Technology Corp

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