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HD404324FS Datasheet(PDF) 69 Page - Renesas Technology Corp |
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HD404324FS Datasheet(HTML) 69 Page - Renesas Technology Corp |
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69 / 103 page ![]() HD404054 Series/HD404094 Series 67 In transfer state, writing data to serial mode register 1A (SM1A: $005) (06, 16) initializes serial interface 1, and STS wait state is entered. If the state changes from transfer to another state, the serial 1 interrupt request flag (IFS1: $003, bit 2) is set by the octal counter that is reset to 000. • Continuous clock output state (only in internal clock mode): Continuous clock output state is entered only in internal clock mode. In this state, the serial interface does not transmit/receive data but only outputs the transmit clock from the SCK 1 pin. When bits 0 and 1 (PMRA0, PMRA1) of port mode register A (PMRA: $004) are 00 in transmit clock wait state and if the transmit clock is input (17), the serial interface enters continuous clock output state. If serial mode register 1A (SM1A: $005) is written to in continuous clock output mode (18), STS wait state is entered. STS wait state (Octal counter = 000, transmit clock disabled) Transmit clock wait state (Octal counter = 000) MCU reset 00 SM1A write 04 STS instruction 01 Transmit clock 02 8 transmit clocks 03 STS instruction (IFS1 1) 05 ← SM1A write (IFS1 1) 06 ← External clock mode STS wait state (Octal counter = 000, transmit clock disabled) Transmit clock wait state (Octal counter = 000) Transfer state (Octal counter 000) SM1A write 14 STS instruction 11 Transmit clock 12 15 STS instruction (IFS1 1) ← 8 transmit clocks 13 Internal clock mode Continuous transmit clock output state (PMRA 0, 1 = 0, 0) SM1A write 18 Transmit clock 17 16 Note: Refer to the Operating States section for the corresponding encircled numbers. MCU reset 10 ← SM1A write (IFS1 1) ≠ Transfer state (Octal counter 000) ≠ Figure 50 Serial Interface State Transitions Output Level Control in Idle States: When serial interface 1 is in STS instruction wait state, the output of serial output pin, SO 1 can be controlled by setting bit 1 (SM1B1) of serial mode register 1B (SM1B: $028) to 0 or 1. The output level control example of serial interface 1 is shown in Figure 51. Note that the output level cannot be controlled in transfer state. |
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