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HD404374FT Datasheet(PDF) 128 Page - Renesas Technology Corp |
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HD404374FT Datasheet(HTML) 128 Page - Renesas Technology Corp |
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128 / 161 page ![]() HD404374/HD404384/HD404389/HD404082/HD404084 Series Rev.5.00, Sep.11.2003, page 128 of 161 Table 32 RAM Address Instructions Operation Mnemonic Operation Code Function Status Words/ Cycles Load W from immediate LWI i 0 0 1 1 1 1 0 0 i 1 i 0 i → W 1/1 Load X from immediate LXI i 1 0 0 0 1 0 i 3 i 2 i 1 i 0 i → X 1/1 Load Y from immediate LYI i 1 0 0 0 0 1 i 3 i 2 i 1 i 0 i → Y 1/1 Load W from A LWA* 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A → W 2/2* Load X from A LXA 0 0 1 1 1 0 1 0 0 0 A → X 1/1 Load Y from A LYA 0 0 1 1 0 1 1 0 0 0 A → Y 1/1 Increment Y IY 0 0 0 1 0 1 1 1 0 0 Y + 1 → Y NZ 1/1 Decrement Y DY 0 0 1 1 0 1 1 1 1 1 Y – 1 → Y NB 1/1 Add A to Y AYY 0 0 0 1 0 1 0 1 0 0 Y + A → Y OVF 1/1 Subtract A from Y SYY 0 0 1 1 0 1 0 1 0 0 Y – A → Y NB 1/1 Exchange X and SPX XSPX 0 0 0 0 0 0 0 0 0 1 X ↔ SPX 1/1 Exchange Y and SPY XSPY 0 0 0 0 0 0 0 0 1 0 Y ↔ SPY 1/1 Exchange X and SPX, Y and SPY XSPXY 0 0 0 0 0 0 0 0 1 1 X ↔ SPX,Y ↔ SPY 1/1 Note: * The assembler automatically provides an operand for the second word of the LAW and LWA instruction. |
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