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HD64F36034 Datasheet(PDF) 53 Page - Renesas Technology Corp |
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HD64F36034 Datasheet(HTML) 53 Page - Renesas Technology Corp |
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53 / 592 page ![]() Section 2 CPU Rev. 4.00 Mar. 15, 2006 Page 21 of 556 REJ09B0026-0400 2.4 Instruction Set 2.4.1 Table of Instructions Classified by Function The H8/300H CPU has 62 instructions. Tables 2.2 to 2.9 summarize the instructions in each functional category. The notation used in tables 2.2 to 2.9 is defined below. Table 2.1 Operation Notation Symbol Description Rd General register (destination)* Rs General register (source)* Rn General register* ERn General register (32-bit register or address register) (EAd) Destination operand (EAs) Source operand CCR Condition-code register N N (negative) flag in CCR Z Z (zero) flag in CCR V V (overflow) flag in CCR C C (carry) flag in CCR PC Program counter SP Stack pointer #IMM Immediate data disp Displacement + Addition – Subtraction × Multiplication ÷ Division ∧ Logical AND ∨ Logical OR ⊕ Logical XOR → Move ¬ NOT (logical complement) :3/:8/:16/:24 3-, 8-, 16-, or 24-bit length |
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