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HD64F36034 Datasheet(PDF) 33 Page - Renesas Technology Corp |
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HD64F36034 Datasheet(HTML) 33 Page - Renesas Technology Corp |
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33 / 592 page ![]() Section 1 Overview Rev. 4.00 Mar. 15, 2006 Page 1 of 556 REJ09B0026-0400 Section 1 Overview 1.1 Features • High-speed H8/300H central processing unit with an internal 16-bit architecture Upward-compatible with H8/300 CPU on an object level Sixteen 16-bit general registers 62 basic instructions • Various peripheral functions Timer B1 (8-bit timer) Timer V (8-bit timer) Timer Z (16-bit timer) Watchdog timer SCI3 (asynchronous or clocked synchronous serial communication interface) TinyCAN (controller area network for Tiny) SSU (synchronous serial communication unit) Subsystem timer (subtimer) 10-bit A/D converter |
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