HD64F36034 datasheet(93/592 Pages) RENESAS

Part #	HD64F36034

Description	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

PDF	592 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 3 Exception Handling

Rev. 4.00 Mar. 15, 2006 Page 61 of 556

REJ09B0026-0400

Vector fetch

Internal

address bus

Internal read

signal

Internal write

signal

Internal data

bus (16 bits)

RES

Internal

processing

Initial program

instruction prefetch

(1) Reset exception handling vector address (H'0000)

(2) Program start address

(3) Initial program instruction

(2)

(3)

(2)

(1)

Reset cleared

Figure 3.1 Reset Sequence

3.4.2

Internal Interrupts

Each on-chip peripheral module has a flag to show the interrupt request status and the enable bit to

enable or disable the interrupt. For direct transfer interrupt request generated by execution of a

SLEEP instruction, this function is included in IRR1, IRR2, IENR1, and IENR2.

When an on-chip peripheral module requests an interrupt, the corresponding interrupt request

status flag is set to 1, requesting the CPU of an interrupt. These interrupts can be masked by

writing 0 to clear the corresponding enable bit.

HD64F36034 Datasheet(PDF) 93 Page - Renesas Technology Corp