HD64F36034 datasheet(55/592 Pages) RENESAS

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Section 2 CPU

Rev. 4.00 Mar. 15, 2006 Page 23 of 556

REJ09B0026-0400

Table 2.3

Arithmetic Operations Instructions (1)

Instruction

Size*

Function

ADD

SUB

B/W/L

Rd ± Rs

→ Rd, Rd ± #IMM → Rd

Performs addition or subtraction on data in two general registers, or on

immediate data and data in a general register (immediate byte data

cannot be subtracted from byte data in a general register. Use the

SUBX or ADD instruction.)

ADDX

SUBX

Rd ± Rs ± C

→ Rd, Rd ± #IMM ± C → Rd

Performs addition or subtraction with carry on byte data in two general

registers, or on immediate data and data in a general register.

INC

DEC

B/W/L

Rd ± 1

→ Rd, Rd ± 2 → Rd

Increments or decrements a general register by 1 or 2. (Byte operands

can be incremented or decremented by 1 only.)

ADDS

SUBS

Rd ± 1

→ Rd, Rd ± 2 → Rd, Rd ± 4 → Rd

Adds or subtracts the value 1, 2, or 4 to or from data in a 32-bit register.

DAA

DAS

Rd (decimal adjust)

→ Rd

Decimal-adjusts an addition or subtraction result in a general register by

referring to the CCR to produce 4-bit BCD data.

MULXU

B/W

× Rs → Rd

Performs unsigned multiplication on data in two general registers: either

8 bits

× 8 bits → 16 bits or 16 bits × 16 bits → 32 bits.

MULXS

B/W

× Rs → Rd

Performs signed multiplication on data in two general registers: either 8

bits

× 8 bits → 16 bits or 16 bits × 16 bits → 32 bits.

DIVXU

B/W

Rd ÷ Rs

→ Rd

Performs unsigned division on data in two general registers: either 16

bits ÷ 8 bits

→ 8-bit quotient and 8-bit remainder or 32 bits ÷ 16 bits →

16-bit quotient and 16-bit remainder.

[Legend]

B: Byte

W: Word

L: Longword

Note:

Refers to the operand size.

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