HD64F36034 datasheet(17/592 Pages) RENESAS

17 / 592 page

Rev. 4.00 Mar. 15, 2006 Page xvii of xxxii

16.4.11

Interrupt Requests ............................................................................................. 377

16.5

Usage Note........................................................................................................................ 378

Section 17 Subsystem Timer (Subtimer) ...........................................................379

17.1

Features............................................................................................................................. 379

17.2

Register Descriptions ........................................................................................................ 381

17.2.1

Subtimer Control Register (SBTCTL) .............................................................. 381

17.2.2

Subtimer Counter (SBTDCNT) ........................................................................ 382

17.2.3

Ring Oscillator Prescaler Setting Register (ROPCR) ....................................... 382

17.3

Operation .......................................................................................................................... 383

17.3.1

SBTPS Division Ratio Setting .......................................................................... 383

17.4

Count Operation................................................................................................................ 387

17.5

Usage Notes ...................................................................................................................... 390

17.5.1

Clock Supply to Watchdog Timer .................................................................... 390

17.5.2

Writing to ROPCR............................................................................................ 390

Section 18 A/D Converter..................................................................................391

18.1

Features............................................................................................................................. 391

18.2

Input/Output Pins .............................................................................................................. 393

18.3

Register Descriptions ........................................................................................................ 394

18.3.1

A/D Data Registers A to D (ADDRA to ADDRD) .......................................... 394

18.3.2

A/D Control/Status Register (ADCSR) ............................................................ 395

18.3.3

A/D Control Register (ADCR) ......................................................................... 396

18.4

Operation .......................................................................................................................... 397

18.4.1

Single Mode...................................................................................................... 397

18.4.2

Scan Mode ........................................................................................................ 397

18.4.3

Input Sampling and A/D Conversion Time ...................................................... 398

18.4.4

External Trigger Input Timing.......................................................................... 399

18.5

A/D Conversion Accuracy Definitions ............................................................................. 400

18.6

Usage Notes ...................................................................................................................... 402

18.6.1

Permissible Signal Source Impedance .............................................................. 402

18.6.2

Influences on Absolute Accuracy ..................................................................... 402

Section 19 Power-On Reset and Low-Voltage Detection Circuits

(Optional).........................................................................................403

19.1

Features............................................................................................................................. 404

19.2

Register Descriptions ........................................................................................................ 405

19.2.1

Low-Voltage-Detection Control Register (LVDCR) ........................................ 405

19.2.2

Low-Voltage-Detection Status Register (LVDSR)........................................... 407

19.3

Operation .......................................................................................................................... 408

HD64F36034 Datasheet(PDF) 17 Page - Renesas Technology Corp

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