HD64F36034 datasheet(238/592 Pages) RENESAS

238 / 592 page

Section 12 Timer Z

Rev. 4.00 Mar. 15, 2006 Page 206 of 556

REJ09B0026-0400

12.4.6

Reset Synchronous PWM Mode

Three normal- and counter-phase PWM waveforms are output by combining channels 0 and 1 that

one of changing points of waveforms will be common.

In reset synchronous PWM mode, the FTIOB0 to FTIOD0 and FTIOA1 to FTIOD1 pins become

PWM-output pins automatically. TCNT_0 performs an increment operation. Tables 12.4 and 12.5

show the PWM-output pins used and the register settings, respectively.

Figure 12.26 shows the example of reset synchronous PWM mode setting procedure.

Table 12.4

Output Pins in Reset Synchronous PWM Mode

Channel

Pin Name

I/O

Pin Function

FTIOC0

Output

Toggle output in synchronous with PWM cycle

FTIOB0

Output

PWM output 1

FTIOD0

Output

PWM output 1 (counter-phase waveform of PWM output 1)

FTIOA1

Output

PWM output 2

FTIOC1

Output

PWM output 2 (counter-phase waveform of PWM output 2)

FTIOB1

Output

PWM output 3

FTIOD1

Output

PWM output 3 (counter-phase waveform of PWM output 3)

Table 12.5

Description

TCNT_0

Initial setting of H'0000

TCNT_1

Not used (independently operates)

GRA_0

Sets counter cycle of TCNT_0

GRB_0

Set a changing point of the PWM waveform output from pins FTIOB0 and

FTIOD0.

GRA_1

Set a changing point of the PWM waveform output from pins FTIOA1 and

FTIOC1.

GRB_1

Set a changing point of the PWM waveform output from pins FTIOB1 and

FTIOD1.

HD64F36034 Datasheet(PDF) 238 Page - Renesas Technology Corp

HD64F36034 Datasheet(HTML) 238 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL