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SH7124 Datasheet(PDF) 87 Page - Renesas Technology Corp |
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SH7124 Datasheet(HTML) 87 Page - Renesas Technology Corp |
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87 / 774 page ![]() Section 4 Clock Pulse Generator (CPG) Rev. 4.00 Jul. 25, 2008 Page 67 of 750 REJ09B0243-0400 Table 4.7 Crystal Resonator Characteristics Frequency (MHz) 10 12.5 Rs Max. ( Ω) (Reference Values) 60 50 C0 Max. (pF) (Reference Values) 7 7 4.6.2 External Clock Input Method Figure 4.4 shows an example of an external clock input connection. In this case, make the external clock high level to stop it when in software standby mode. During operation, make the external input clock frequency 10 to 12.5 MHz. When leaving the XTAL pin open, make sure the parasitic capacitance is less than 10 pF. Even when inputting an external clock, be sure to wait at least the oscillation stabilization time in power-on sequence or in releasing software standby mode, in order to ensure the PLL stabilization time. EXTAL XTAL External clock input Open state Figure 4.4 Example of External Clock Connection |
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