SH7124 datasheet(18/774 Pages) RENESAS

18 / 774 page

Rev. 4.00 Jul. 25, 2008 Page xviii of xx

16.2.2 Port B Data Registers H and L (PBDRH and PBDRL) ........................................ 560

16.2.3 Port B Port Registers H and L (PBPRH and PBPRL) .......................................... 563

16.3

Port E ................................................................................................................................. 566

16.3.1 Register Descriptions............................................................................................ 568

16.3.2 Port E Data Register L (PEDRL).......................................................................... 568

16.3.3 Port E Port Register L (PEPRL) ........................................................................... 571

16.4

Port F ................................................................................................................................. 573

16.4.1 Register Descriptions............................................................................................ 573

16.4.2 Port F Data Register L (PFDRL) .......................................................................... 574

Section 17 Flash Memory.................................................................................. 575

17.1

Features.............................................................................................................................. 575

17.2

Overview............................................................................................................................ 577

17.2.1 Block Diagram...................................................................................................... 577

17.2.2 Operating Mode .................................................................................................... 578

17.2.3 Mode Comparison ................................................................................................ 579

17.2.4 Flash Memory Configuration................................................................................ 580

17.2.5 Block Division ...................................................................................................... 580

17.2.6 Programming/Erasing Interface ............................................................................ 581

17.3

Input/Output Pins ...............................................................................................................583

17.4

Register Descriptions ......................................................................................................... 583

17.4.1 Registers ............................................................................................................... 583

17.4.2 Programming/Erasing Interface Registers ............................................................ 586

17.4.3 Programming/Erasing Interface Parameters ......................................................... 592

17.5

On-Board Programming Mode .......................................................................................... 607

17.5.1 Boot Mode ............................................................................................................ 607

17.5.2 User Program Mode

(Only in On-Chip 128-Kbyte and 64-Kbyte ROM Version) ................................ 611

17.6

Protection ........................................................................................................................... 620

17.6.1 Hardware Protection ............................................................................................. 620

17.6.2 Software Protection............................................................................................... 621

17.6.3 Error Protection .................................................................................................... 621

17.7

Usage Notes ....................................................................................................................... 623

17.7.1 Interrupts during Programming/Erasing ............................................................... 623

17.7.2 Other Notes........................................................................................................... 625

17.8

Supplementary Information ............................................................................................... 627

17.8.1 Specifications of the Standard Serial Communications Interface

in Boot Mode ........................................................................................................ 627

17.8.2 Areas for Storage of the Procedural Program and Data for Programming............ 654

17.9

Off-Board Programming Mode.......................................................................................... 658

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