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SH7713 Datasheet(PDF) 591 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 591 Page - Renesas Technology Corp |
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591 / 904 page ![]() Section 16 Serial Communication Interface with FIFO (SCIF) Rev.1.50 Aug. 30, 2006 Page 551 of 860 REJ09B0288-0150 Bit Bit Name Initial Value R/W Description 1 RDF 0 R/(W)* Receive FIFO Data Full Indicates that the received data has been transferred from SCRSR to SCFRDR, and the number of receive data bytes in SCFRDR is equal to or greater than the receive trigger number set by bits RTRG1 and RTRG0 in SCFCR. 0: The number of receive data bytes in SCFRDR is less than the receive trigger set number [Clearing conditions] • Power-on reset or manual reset • When SCFRDR is read until the number of receive data bytes in SCFRDR is less than the receive trigger set number, and 0 is written to RDF after reading RDF = 1 • When SCFRDR is read by the DMAC until the number of receive data bytes in SCFRDR is less than the receive trigger set number 1: The number of receive data bytes in SCFRDR is equal to or greater than the receive trigger set number [Setting condition] When SCFRDR contains at least the receive trigger set number of receive data bytes* Note: * SCFRDR is a 16-byte FIFO register. When RDF = 1, at least the receive trigger set number of data bytes can be read. If data is read when SCFRDR is empty, an undefined value will be returned. The number of receive data bytes in SCFRDR is indicated by the lower bits in SCFDR. |
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