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SH7713 Datasheet(PDF) 651 Page - Renesas Technology Corp

Part # SH7713
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7713 Datasheet(HTML) 651 Page - Renesas Technology Corp

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Section 17 Serial I/O with FIFO (SIOF)
Rev.1.50 Aug. 30, 2006 Page 611 of 860
REJ09B0288-0150
17.3.12
Serial Transmit Control Data Register (SITCR)
SITCR is used to specify the SIOF transmit control data. SITCR can be specified only when the
FL3 to EL0 bits in SIMDR are specified as 1xxx. SITCR is initialized by a power-on reset,
software reset, or transmit reset.
Bit
Bit Name
Initial
Value
R/W
Description
31 to 16
SITC015 to
SITC00
All 0
W
Control Channel 0 Transmit Data
Specify data to be output from the TXD_SIO pin as
control channel 0 transmit data. The position of the
control channel 0 data in the transmission or reception
frame is specified by the CD0A bit in SICDAR.
These bits are valid only when the CD0E bit in SICDAR
is set to 1.
15 to 0
SITC115 to
SITC10
All 0
W
Control Channel 1 Transmit Data
Specify data to be output from the TXD_SIO pin as
control channel 1 transmit data. The position of the
control channel 1 data in the transmission or reception
frame is specified by the CD1A bit in SICDAR.
These bits are valid only when the CD1E bit in SICDAR
is set to 1.



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