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SH7713 Datasheet(PDF) 656 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 656 Page - Renesas Technology Corp |
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656 / 904 page ![]() Section 17 Serial I/O with FIFO (SIOF) Rev.1.50 Aug. 30, 2006 Page 616 of 860 REJ09B0288-0150 SCK_SIO SIOFSYNC TXD_SIO RXD_SIO SCK_SIO SIOFSYNC TXD_SIO RXD_SIO (a) Falling-edge sampling (a) Rising-edge sampling Reception timing Transmission timing Reception timing Transmission timing Figure 17.4 SIOF Transmit/Receive Timing 17.4.3 Transfer Data Format The SIOF performs the following transfer. • Transmit/receive data: Transfer of 8-bit data/16-bit data/16-bit stereo data • Control data: Transfer of 16-bit data (uses the specific register as interface) Transfer Mode: The SIOF supports the following four transfer modes as listed in table 17.3. The transfer mode can be specified by the TRMD1 and TRMD0 bits in SIMDR. Table 17.3 Serial Transfer Modes Transfer Mode SIOFSYNC Bit Delay Control Data Slave mode 1 Synchronous pulse One bit Slot position Slave mode 2 Synchronous pulse One bit Secondary FS Master mode 1 Synchronous pulse One bit Slot position Master mode 2 L/R No Not supported Frame Length: The length of the frame to be transferred by the SIOF is specified by the FL3 to FL0 bits in SIMDR. Table 17.4 shows the relationship between the settings of the FL3 to FL0 bits and frame length. |
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