SH7713 datasheet(671/904 Pages) RENESAS

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Section 17 Serial I/O with FIFO (SIOF)

Rev.1.50 Aug. 30, 2006 Page 631 of 860

REJ09B0288-0150

SCK_SIO

RXD_SIO

TXD_SIO

SIOFSYNC

Lch.DATA

Slot No.0

TRMD = 00or10,

TDLE = 1,

RDLE = 1,

CD0E = 0,

REDG = 0,

TDLA3 to TDLA0 = 0000,

RDLA3 to RDLA0 = 0000,

CD0A3 to CD0A0 = 0000,

FL = 0000 (frame legth: 8 bits)

TDRE = 0,

RDRE = 0,

CD1E = 0,

TDRA3 to TDRA0 = 0000,

RDRA3 to RDRA0 = 0000,

CD1A3 to CD1A0 = 0000

Setting:

1 frame

1-bit delay

Figure 17.13 Transmission and Reception Timings (8-Bit Monaural Data (1))

8-bit Monaural Data (2): Synchronous pulse method, falling edge sampling, slot No.0 used for

transmit and receive data, frame length = 16 bits

SCK_SIO

RXD_SIO

TXD_SIO

SIOFSYNC

Lch.DATA

TRMD = 00or10,

TDLE = 1,

RDLE = 1,

CD0E = 0,

REDG = 0,

TDLA3 to TDLA0 = 0000,

RDLA3 to RDLA0 = 0000,

CD0A3 to CD0A0 = 0000,

FL = 0100 (frame length: 16 bits)

TDRE = 0,

RDRE = 0,

CD1E = 0,

TDRA3 to TDRA0 = 0000,

RDRA3 to RDRA0 = 0000,

CD1A3 to CD1A0 = 0000

Slot No.0

Slot No.1

Setting:

1 frame

1-bit delay

Figure 17.14 Transmission and Reception Timings (8-Bit Monaural Data (2))

16-bit Monaural Data (1): Synchronous pulse method, falling edge sampling, slot No.0 used for

transmit and receive data, frame length = 64 bits

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