SH7721 datasheet(719/1524 Pages) RENESAS

719 / 1524 page

Section 20

2C Bus Interface (IIC)

Rev. 3.00 Jan. 18, 2008 Page 657 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description

AAS

R/W

Slave Address Recognition Flag

In slave receive mode, this flag is set to 1 if the first frame

following a start condition matches bits SVA6 to SVA0 in

SAR.

[Setting conditions]

• When the slave address is detected in slave receive

mode

• When the general call address is detected in slave

receive mode.

[Clearing condition]

• When 0 is written in AAS after reading AAS = 1

ADZ

R/W

General Call Address Recognition Flag

This bit is valid in I

2C bus format slave receive mode.

[Setting condition]

• When the general call address is detected in slave

receive mode

[Clearing conditions]

• When 0 is written in ADZ after reading ADZ = 1

20.3.6

Slave Address Register (SAR)

SAR selects the communication format and sets the slave address. When the chip is in slave mode

with the I

2C bus format, if the upper 7 bits of SAR match the upper 7 bits of the first frame

received after a start condition, the chip operates as the slave device.

Bit

Bit Name

Initial

Value

R/W

Description

7 to 1

SVA6 to

SVA0

All 0

R/W

Slave Address 6 to 0

These bits set a unique address in bits SVA6 to SVA0,

differing form the addresses of other slave devices

connected to the I

2C bus.



Reserved

These bits are always read as 0. The write value should

always be 0.

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